Systems and methods for providing shunt cancellation of parasitic components in a plasma reactor

ABSTRACT

Systems and methods for negating an impedance associated with parasitic capacitance are described. One of the systems includes a plasma chamber having a housing. The housing includes a pedestal, a showerhead situated above the pedestal to face the pedestal, and a ceiling located above the showerhead. The system further includes a radio frequency (RF) transmission line coupled to the plasma chamber for transferring a modified RF signal to the showerhead. The system includes a shunt circuit coupled within a pre-determined distance from the ceiling. The shunt circuit is coupled to the RF transmission line for negating the impedance associated with the parasitic capacitance within the housing.

FIELD

The present embodiments relate to systems and methods for providingshunt cancellation of parasitic components in a plasma reactor.

BACKGROUND

Generally, process reactors are used to process operations upon wafers,e.g., silicon wafers. These wafers are typically processed numeroustimes in various reactors in order to form integrated circuits thereon.Some of these process operations involve, for instance, depositingmaterials over select surfaces or layers of a wafer. One such reactor isa plasma enhanced chemical vapor deposition (PECVD) reactor.

For example, a PECVD reactor may be used to deposit insulation filmssuch as silicon oxide (SiO), silicon nitride (SiN), silicon carbide(SiC), silicon oxycarbide (SiOC), and others. Such material films mayinclude an aluminum (Al) alloy. Depending on the type of film beingdeposited, specific reaction gases are brought into the PECVD reactorwhile radio frequency (RF) power is supplied to produce plasma thatenables the deposition. The RF power is generated by an RF generator andprovided via a matchbox to an electrode of the PECVD reactor. However,the RF power delivered to the electrode is reduced.

It is in this context that embodiments described in the presentdisclosure arise.

SUMMARY

Embodiments of the disclosure provide systems and methods for providingshunt cancellation of parasitic components in a plasma reactor. Itshould be appreciated that the present embodiments can be implemented innumerous ways, e.g., a process, an apparatus, a system, a device, or amethod on a computer-readable medium. Several embodiments are describedbelow.

Plasma enhanced chemical vapor deposition (PECVD) and atomic layerdeposition (ALD) chambers are classified into two types, such as,chandelier-type and flush-mount type. The chandelier-type chamber has aradio frequency (RF) powered electrode physically detached from achamber wall and the RF powered electrode is suspended by a stem thatextends from a ceiling of a housing of the chandelier-type chamber. Inthe flush-mount type chamber, the RF powered electrode is supportedaround its periphery with fastening hardware that electrically insulatesthe RF powered electrode from a ground potential of the flush-mount typechamber. In these types of chambers, there is non-zero parasiticcapacitance between the RF powered electrode and the housing. Theparasitic capacitance of flush-mount type chamber is higher than that inthe chandelier-type chamber, e.g., by a factor of 3 to 5.

When RF power is applied to the flush-mount type chamber, displacementcurrent flows through the parasitic capacitance and RF power is noteffectively coupled to a wafer situated on a pedestal of the flush-mounttype chamber. The ineffectively coupled RF power causes very low or nodeposition on the wafer. Also, RF components, such as a showerhead, ofthe flush-mount type chamber receive high RF currents due to theparasitic capacitance that is present in parallel to the RF poweredelectrode. RF delivery hardware, such as coax cables and matchingnetworks, cannot easily handle the high RF currents without increasingdesign and hardware costs associated with the flush-mount type chamber.

In various embodiments, a shunt cancellation RF circuit is added to acapacitively-coupled plasma (CCP) reactor, e.g., the flush-mount typechamber, the chandelier-type chamber, etc., to compensate for theparasitic capacitance. The shunt cancellation RF circuit minimizesparasitic RF coupling and maximizes power coupled to the wafer toincrease a deposition rate of depositing materials on the wafer. Also,due to suppression of parasitic RF current paths by the shuntcancellation RF circuit, an input RF current to the showerhead isreduced. The RF current paths, in some embodiments, are paths created bythe parasitic capacitance.

In several embodiments, a system for negating, e.g., nullifying,reducing, etc., an impedance associated with the parasitic capacitanceis described. The system includes a plasma chamber having a housing. Thehousing includes a pedestal, a showerhead situated above the pedestal toface the pedestal, and a ceiling located above the showerhead. Thesystem further includes an RF transmission line coupled to the plasmachamber for transferring a modified RF signal to the showerhead. Thesystem includes a shunt circuit coupled within a pre-determined distancefrom the ceiling. The shunt circuit is coupled to the RF transmissionline for negating the impedance associated with the parasiticcapacitance within the housing.

In some embodiments, a shunt circuit is described. The shunt circuitincludes a variable capacitor and an inductor coupled in parallel withthe variable capacitor to form a first end and a second end. The firstend is coupled to an RF transmission line coupled between an impedancematching circuit and a showerhead of a plasma chamber. The second end iscoupled to a housing of the plasma chamber. The variable capacitor andthe inductor negate an impedance associated with the parasiticcapacitance within the housing.

In various embodiments, a multi-station processing tool is described.The multi-station processing tool includes an RF generator configured togenerate an RF signal. The multi-station processing tool furtherincludes an impedance matching circuit coupled to the RF generator toreceive the RF signal to output a modified RF signal and a powersplitter coupled to the impedance matching circuit to distribute powerof the modified RF signal to output a plurality of modified RF outputsignals. The multi-station processing tool includes a first stationcoupled to a first output of the power splitter via a first RFtransmission line to receive a first one of the modified RF outputsignals. The multi-station processing tool also includes a secondstation coupled to a second output of the power splitter via a second RFtransmission line to receive a second one of the modified RF outputsignals. The multi-station processing tool includes a first shuntcircuit coupled to the first RF transmission line to negate an impedanceassociated with a parasitic capacitance associated with the firststation. The multi-station processing tool includes a second shuntcircuit coupled to the second RF transmission line to negate animpedance associated with a parasitic capacitance associated with thesecond station.

Several advantages of the systems and methods for providing shuntcancellation of parasitic components in a plasma reactor include anincreased efficiency of RF power delivered to a gap between theshowerhead and the pedestal. For example, a shunt RF circuit deceasescoupling of RF to the chamber wall and makes a load, e.g., the PECVDchamber, the ALD chamber, etc., less capacitive. The RF current input tothe plasma reactor decreases and power lost in the RF componentsdecreases. To illustrate, power delivered to the plasma reactorincreases from 55% to 85% of setpoint power, which is power supplied byan RF generator. The increase in power results in higher depositionrates, which results in a higher efficiency in processing wafers.

Additional advantages of the herein described systems and methods forproviding shunt cancellation of parasitic components in a plasma reactorinclude station-to-station matching and reduced cost of RF hardware dueto reduction, e.g., elimination, of the RF current paths. For instance,a total current to the RF powered electrode drops from 26 amperes to 9.5amperes when a shunt circuit is used. The low total current decreases arisk of station-to-station variation that is caused by a small variationof parasitic capacitance between the stations. Also, the low totalcurrent means that the RF hardware need not be designed to handle highcurrents.

Further advantages of the herein described systems and methods forproviding shunt cancellation of parasitic components in a plasma reactorinclude an increase in accuracy of RF power measurement. For instance, aphase of RF power measured is −82° without a shunt circuit. When thephase of RF power is close to −90°, an accuracy of metrology decreases.With the shunt circuit installed, the phase measured is −68°. As aresult, an accuracy of measurement improves, which makes troubleshootingeasier.

Other aspects will become apparent from the following detaileddescription, taken in conjunction with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

The embodiments may best be understood by reference to the followingdescription taken in conjunction with the accompanying drawings.

FIG. 1A is a diagram of an embodiment of a plasma processing system toillustrate use of a shunt circuit with a flush-mount type plasmachamber.

FIG. 1B is a diagram of an embodiment of a plasma processing system toillustrate use of a shunt circuit with a chandelier-type plasma chamber.

FIG. 1C is a diagram of an embodiment of a plasma processing system inwhich a shunt circuit is situated within a housing of the flush-mounttype plasma chamber.

FIG. 1D is a diagram of an embodiment of a plasma processing system inwhich a plasma chamber includes a shunt circuit within a housing of thechandelier-type plasma chamber.

FIG. 1E is a diagram of an embodiment of a plasma processing system toillustrate a coupling of a shunt circuit to a point on a radio frequency(RF) transmission line that is coupled to a bottom electrode of aflush-mount type plasma chamber instead of a top electrode of theflush-mount type plasma chamber.

FIG. 1F is a diagram of an embodiment of a plasma processing system toillustrate a coupling of a shunt circuit to a point on an RFtransmission line that is coupled to a bottom electrode of achandelier-type plasma chamber instead of a top electrode of thechandelier-type plasma chamber.

FIG. 1G is a diagram of an embodiment of a plasma processing system toillustrate use of a shunt circuit within a housing of the flush-mounttype plasma chamber of FIG. 1E to negate an impedance associated withparasitic capacitance of the flush-mount type plasma chamber.

FIG. 1H is a diagram of an embodiment of a plasma processing system toillustrate use of a shunt circuit within a housing of thechandelier-type plasma chamber to negate an impedance associated withparasitic capacitance of the chandelier-type type plasma chamber.

FIG. 2 is a diagram of an embodiment of a plasma processing system.

FIG. 3 illustrates a top view of an embodiment of a multi-stationprocessing tool in which four processing stations are provided.

FIG. 4 shows a schematic view of an embodiment of a multi-stationprocessing tool with an inbound load lock and an outbound load lock.

FIG. 5A is a diagram of an embodiment of a system to illustrate use of afixed inductor as a shunt circuit to negate impedances associated withparasitic capacitances.

FIG. 5B is a diagram of an embodiment of a system to illustrate a shuntcircuit having a variable inductor.

FIG. 5C is a diagram of an embodiment of a system to illustrate a shuntcircuit having a variable capacitor and a fixed inductor.

FIG. 5D is a diagram of an embodiment of a system to illustrate a shuntcircuit having a variable inductor and a fixed capacitor.

FIG. 5E is a diagram of an embodiment of a system to illustrate a shuntcircuit having a variable capacitor and a variable inductor.

FIG. 6A is a diagram of an embodiment of a system to illustrate a changein capacitance of a capacitor of a shunt circuit until a parameter iswithin a pre-determined range.

FIG. 6B is a diagram of an embodiment of a system to illustrate a changein an inductance of an inductor of a shunt circuit until the parameteris within a pre-determined span.

FIG. 6C is a diagram of an embodiment of a system to illustrate a changein capacitance of a capacitor of a shunt circuit and an inductance of aninductor of the shunt circuit until the parameter is within apre-determined extent.

FIG. 6D is an embodiment of a graph to illustrate a difference inimpedances with and without use of a shunt circuit.

FIG. 6E is an embodiment of a table to illustrate measurements by avoltage and current (VI) probe of voltage, current, phase, and power ofa radio frequency signal at an output of an impedance matching circuitwithout use of a shunt circuit and with use of the shunt circuit.

FIG. 7 is a diagram of an embodiment of a system for illustrating use ofa shunt circuit with each of the stations.

FIG. 8A is an embodiment of a graph to illustrate impedances associatedwith parasitic capacitances within the stations when a shunt circuit isnot used with any of the stations.

FIG. 8B is an embodiment of a graph to illustrate negation of impedancesassociated with parasitic capacitances within the stations when a shuntcircuit is used with the stations.

FIG. 8C is an embodiment of a table to illustrate an amount of voltageassociated with parasitic capacitance at each of the stations when ashunt circuit is not used with any of the stations.

FIG. 8D is an embodiment of a table to illustrate a change in voltages,currents, phases, and power when a shunt circuit is used at thestations.

FIG. 9A is a diagram of an embodiment of a multi-station system fornegating impedances associated with parasitic capacitances of thestations by modifying capacitances of capacitors of shunt circuitsassociated with the stations.

FIG. 9B is a diagram of an embodiment of a multi-station system fornegating impedances associated with parasitic capacitances of thestations by changing inductances of inductors of shunt circuits usedwith the stations.

FIG. 9C is a diagram of an embodiment of a multi-station system fornegating impedances associated with parasitic capacitances of thestations by changing inductances of inductors and capacitors of shuntcircuits used within the multi-station system.

FIG. 10A is an embodiment of a graph to illustrate impedances associatedwith the stations when shunt circuits coupled to the stations are usedto balance a parameter at outputs of a power splitter.

FIG. 10B is an embodiment of a table to illustrate balancing of power atthe stations.

DETAILED DESCRIPTION

The following embodiments describe systems and methods for providingshunt cancellation of parasitic components in a plasma reactor. It willbe apparent that the present embodiments may be practiced without someor all of these specific details. In other instances, well known processoperations have not been described in detail in order not tounnecessarily obscure the present embodiments.

Deposition of films is preferably implemented in a plasma enhancedchemical vapor deposition (PECVD) system or an atomic layer deposition(ALD) chamber. The PECVD system may take many different forms. The PECVDsystem includes one or more plasma chambers or “reactors” (sometimesincluding multiple stations) that house one or more wafers and aresuitable for wafer processing. Each plasma chamber houses one or morewafers for processing. The one or more plasma chambers maintain a waferin a defined position or positions with or without motion, e.g.rotation, vibration, or other agitation, etc., within that position. Thewafer undergoing deposition is transferred from one station to anotherduring a process. The film deposition occurs entirely at a singlestation or any fraction of the film is deposited at any number ofstations. While in process, each wafer is held in place by a pedestal,e.g., a wafer chuck, etc., and/or other wafer holding apparatus of theplasma chamber.

A capacitively coupled plasma (CCP) reactor, e.g., the ALD chamber, thePECVD chamber, etc., has an inherent parasitic capacitance between ashowerhead, which includes a radio frequency (RF) powered electrode, anda chamber wall, which is grounded. In some cases, due to geometry of theCCP reactor and the RF powered electrode, this parasitic capacitance isso high that RF current through the parasitic capacitance is higher thanRF current through a wafer processing cavity, which is a gap between theshowerhead and the pedestal of the CCP reactor. The high parasiticcoupling decreases delivered RF power used for processing the wafer. Asa result, a deposition rate of depositing materials on the waferreduces.

One solution is to increase the RF current that is supplied to the waferprocessing cavity. For example, an RF hardware system is sometimes usedto handle the high RF current. However, the RF hardware system iscost-prohibitive.

In some embodiments, a shunt RF circuit is added to the CCP reactor tocounter, e.g., cancel, the parasitic capacitance and make the CCPreactor resonate at an applied frequency. For example, when an inductoris coupled to an RF transmission line coupled to the RF poweredelectrode located above a gas distribution plate (GDP), the parasiticcapacitance is reduced. The GDP has multiple through holes fortransferring one or more processing gases for processing the wafer. Inaddition, by adding an adjustable capacitor parallel to the inductor, aninductance of the inductor is tuned to reduce the parasitic capacitanceto null or close to zero and resonate the CCP reactor at a frequency ofoperation e.g., 13.56 megahertz (MHz), 400 kilohertz, 2 megahertz, 60megahertz, 27.12 megahertz. In this manner, RF power delivered to thewafer processing cavity is maximized

FIG. 1A is a diagram of a plasma processing system 100 to illustrate aflush-mount type plasma chamber 102. The plasma processing system 100includes an RF generator 104, an impedance matching circuit (IMC) 106, ashunt circuit 108, and a voltage and current (VI) probe 110, which isoptional.

The plasma chamber 102 includes a showerhead 114 and a pedestal 116. Thepedestal 116 has embedded within it a bottom electrode 118. Also, theshowerhead 114 has embedded within it a top electrode 120. For example,the top electrode 120 is surrounded by an insulator, e.g., ceramic. Eachof the top electrode 120 and the bottom electrode 118 is made of ametal, e.g., molybdenum, alloy of molybdenum, etc. The showerhead 114faces the pedestal 116 and is located opposite the pedestal 116. Theplasma chamber 102 has a housing, which is made of a side wall 122, aceiling 124, and a bottom portion 126. In various embodiments, theceiling 124 is referred to herein as a chamber top plate. The showerhead114, the pedestal 116, and a side mount 138 are located within thehousing. The side mount 138 is further described below. In variousembodiments, the bottom portion 126 is referred to herein as a chamberbottom plate. For example, under the chamber bottom plate, vacuum pumpsare located for evacuating remnants, e.g., one or more process gases, ofprocessing a wafer 112 from the housing.

In some embodiments, the side wall 122 has a circular shape or an ovalshape. In various embodiments, the side wall 122 is formed of fourrectangular or square shape sides. To illustrate, the side wall 122 hasa first side, a second side adjacent to and connected to the first side,a third side adjacent to and connected to the second side, and a fourthside adjacent to and connected to the third side and adjacent to andconnected to the first side.

The ceiling 124 has a top surface 125 and a bottom surface 127. Thebottom surface 127 faces a top surface 135 of the showerhead 114 and thetop surface 125 of the ceiling 124 faces the shunt circuit 108. Thebottom surface 127 of the ceiling 124 does not face the shunt circuit108. The bottom portion 126 is located opposite to the ceiling 124 andfaces the ceiling 124. The side wall 122 is adjacent to and connected tothe ceiling 124 and is adjacent to and connected to the bottom portion126. The housing of the plasma chamber 102 is coupled to a groundpotential. The showerhead 114 is coupled to the side wall 122 via theside mount 138. For example, the showerhead 114 is anchored to the sidewall 122 via the side mount 138 so that the side wall 122 supports theshowerhead 114. The side mount 138 is made of one or more electricallyinsulating materials, e.g., ceramic. In some embodiments, any number ofside mounts connects the showerhead 114 to the side wall 122.

The RF generator 104 is coupled to the IMC 106 via an RF cable 130 andthe IMC 106 is coupled to the plasma chamber 102 via an RF transmissionline 132, e.g., a coaxial cable. An inductance of the RF transmissionline 132 is represented as L1 f. The RF transmission line 132 extendsthrough the ceiling 124, e.g., via a hole in the ceiling 124, into thehousing to connect to the top electrode 120.

The plasma chamber 102 is a capacitively-coupled plasma (CCP) chamberand is an example of the PECVD system used to process a wafer 112.Examples of the RF generator 104 include a 400 kilohertz (kHz) RFgenerator, a 2 megahertz (MHz) RF generator, a 13.56 MHz RF generator, a27.12 MHz RF generator, a 60 MHz RF generator. The RF generator 104includes an RF power supply, e.g., an RF oscillator, for generating anRF signal.

The IMC 106 is a network of circuit elements, e.g., resistors,capacitors, inductors, etc., that match an impedance of a load connectedto an output O1 of the IMC 106 with an impedance of a source connectedto one or more inputs of the IMC 106. For example, the IMC 106 matchesan impedance of the RF transmission line 132 and the plasma chamber 102with that of the RF cable 130 and the RF generator 104. Examples of theVI probe 110 include a complex voltage and current sensor, a voltagesensor, a current sensor, a power sensor, an impedance sensor, etc.

The RF transmission line 132 is coupled to the shunt circuit 108 at apoint P1, which is located a pre-determined distance from the ceiling124. For example, the shunt circuit 108 is located above the ceiling 124and is connected to the RF transmission line 132 at the point P1immediately before the RF transmission line 132 extends via the ceiling124 into the housing of the plasma chamber 102. As another example, theshunt circuit 108 is supported by the ceiling 124 and is placed on thetop surface 125 of the ceiling 124 to be supported by the ceiling 124.As yet another example, the shunt circuit 108 is located inside theplasma chamber 102 and is supported by the bottom surface 127 of theceiling 124.

The shunt circuit 108 includes a capacitor Cs and an inductor Ls. Anexample value of the capacitor Cs is 4 picoFarad (pF). Another examplevalue of the capacitor Cs is 70 pF. As yet another example, a value ofthe capacitor Cs varies between 4 pF and 70 pF. An example value of theinductor Ls is 0.2 microHenry. Another example value of the inductor Lsis 0.4 microHenry. As yet another example, a value of the inductor Lsvaries between 0.2 and 0.4 microHenry. The inductor Ls is coupled inparallel to the capacitor Cs. The inductor Ls is coupled to thecapacitor Cs at one end E1, which is connected to the point P1 on the RFtransmission line 132. Moreover, the inductor Ls is coupled to thecapacitor Cs at another end E2 opposite to the end E1, and the end E2 iscoupled to the ground potential. In some embodiments, the end E2 iscoupled to the ground potential by connecting the end E2 to the topsurface 125 of the ceiling 124, which is also coupled to the groundpotential. The VI probe 110 is coupled to the output O1 of the IMC 106.

The RF power supply of the RF generator 104 generates an RF signal,which is transferred via the RF cable 130 to the IMC 106. The IMC 106matches an impedance of the load with that of the source to generate amodified RF signal at its output O1. The modified RF signal istransferred via the RF transmission line 132 via the point P1 to the topelectrode 120 of the showerhead 114. Moreover, the bottom electrode 118is coupled to the ground potential. For example, the bottom electrode118 is coupled to the ground potential of the housing of the plasmachamber 102 via an RF strap. The RF strap has an inductance, which isillustrated by an inductor L2. Simultaneous with the supply of themodified RF signal to the top electrode 120, one or more process gasesare supplied to the showerhead 114 to further be supplied to a gapbetween the pedestal 116 and the showerhead 114 to generate or maintainplasma within the gap. When the modified RF signal is provided to thetop electrode 120 and the bottom electrode 118 is coupled to ground,plasma is created or maintained in the gap. The plasma is represented bya series combination of a capacitance and a resistance. The capacitancebetween the showerhead 114 and the pedestal 116 is illustrated by acapacitor C2 when plasma is absent. The capacitance between theshowerhead 114 and the pedestal 116 represents the gap between theshowerhead 114 and the pedestal 116. The plasma is used to process thewafer 112 situated on a top surface of the pedestal 116.

The layout of the showerhead 114 and the ceiling 124, e.g., a distancebetween the top surface 135 of the showerhead 114 and the ceiling 124,creates a parasitic capacitance C11 f between the top surface 135 of theshowerhead 114 and the ceiling 124. Moreover, a layout of the showerhead114 and the side wall 122, e.g., a distance between a side surface ofthe showerhead 114 and the wall 114, creates another parasiticcapacitance C12 f between the showerhead 114 and the side wall 122. Theside surface of the showerhead 114 faces the side wall 122 and isadjacent to the top surface 135 of the showerhead 114. The top surface135 of the showerhead 114 faces the ceiling 124. The top surface 135 ofthe showerhead 114 is opposite to a bottom surface of the showerhead 114and the bottom surface of the showerhead 114 faces the gap between theshowerhead 114 and the pedestal 116.

The parasitic capacitance C11 f creates a low impedance path between thetop surface 135 of the showerhead 114 and the ceiling 124 and theparasitic capacitance C12 f creates a low impedance path between theside surface of the showerhead 114 and the side wall 122. Some RFcurrent of the modified RF signal flows from the top surface 135 of theshowerhead 114 to the ceiling 124 via the low impedance path having theparasitic capacitance C11 f and some RF power of the modified RF signalpasses from the side surface of the showerhead 114 to the side wall 122via the low impedance path having the parasitic capacitance C12 f. As aresult of the low impedance paths created by the parasitic capacitancesC11 f and C12 f, when the shunt circuit 108 is not used, a higher amountof current is to be generated by the RF generator 104 and supplied tothe top electrode 120 via the IMC 106 and the RF transmission line 132.Moreover, the low impedance paths created by the parasitic capacitancesC11 f and C12 f reduces effectiveness in processing the wafer 112. Forexample, a deposition rate of depositing materials on the wafer 112 or arate of cleaning the wafer 112 is reduced due to the low impedancepaths.

The shunt circuit 108 increases impedances of the low impedance pathscreated by the parasitic capacitances C11 f and C12 f so that RF voltageof the modified RF signal that is transferred via the RF transmissionline 132 to the top electrode 120 to generate or maintain the plasmawithin the gap is increased. For example, the impedances, in total, areincreased from 5 ohms to 150 ohms. By controlling a capacitance of thecapacitor Cs, or an inductance of the inductor Ls, or both, theimpedances of the low impedance paths are increased. For example, thecapacitance of the capacitor Cs, or the inductance of the inductor Ls,or both are changed manually or electrically. To illustrate, a personchanges a distance between parallel plates of the capacitor Cs or anarea between the two plates by rotating one of the plates with respectto another one of the plates. As another example, a person replaces afirst core surrounded by coil turns of the inductor Ls with a secondcore to change permeability of the inductor Ls to change inductance ofthe inductor Ls. As yet another example, a person displaces an amount bywhich the core of the inductor Ls is surrounded by coil windings of theinductor Ls to change inductance of the inductor Ls. Impedancesassociated with the parasitic capacitances C11 f and C12 f are negatedby increasing the impedances of the low impedance paths. For example,the impedances associated with the parasitic capacitances C11 f and C12f are low. With the use of the shunt circuit 108, the low impedances arenegated by increasing the low impedances.

In some embodiments, the IMC 106 has multiple inputs with each inputcoupled via an RF cable to a different RF generator. For example, afirst input of the IMC 106 is connected via a first RF cable to a 400kHz RF generator and a second input of the IMC 106 is connected via asecond RF cable to a 13.56 MHz RF generator. As another example, a firstinput of the IMC 106 is connected via a first RF cable to a 2 MHz RFgenerator, a second input of the IMC 106 is connected via a second RFcable to the 13.56 MHz RF generator, and a third input of the IMC 106 isconnected via a third RF cable to a 60 MHz RF generator.

In various embodiments, instead of the top electrode 120 being coupledto the IMC 106, the top electrode 120 is coupled to the ground potentialand the bottom electrode 118 is coupled to the IMC 106 via the RFtransmission line 132. The IMC 106 is coupled to the RF generator 104via the RF cable 130. The shunt circuit 108 is coupled to the point P1on the RF transmission line 132 coupled to the bottom electrode 118. Thepoint P1 is located within the pre-determined distance below a bottomsurface 133 of the bottom portion 126. The end E2 of the shunt circuit108 is coupled to the ground potential by being coupled within thepre-determined distance from the bottom portion 126. For example, theshunt circuit 108 is located below the bottom portion 126 and the end E2of the shunt circuit 108 is coupled to the bottom surface 133 of thebottom portion 126. The bottom portion 126 has a top surface 131, whichfaces the pedestal 116. The bottom surface 133 does not face thepedestal 116 and faces the shunt circuit 108.

In some embodiments, a top electrode of a showerhead of a plasma chamberis exposed to the gap and is not encapsulated within the insulator. Forexample, instead of the top electrode 120 being encapsulated in theinsulator, another top electrode, e.g., an electrode fabricated fromaluminum, an electrode fabricated from an alloy of aluminum, etc., isused, and the other electrode is not encapsulated within the insulator.

FIG. 1B is a diagram of an embodiment of a plasma processing system 150in which a chandelier-type plasma chamber 152 is used instead of theflush-mount type plasma chamber 102 (FIG. 1A). The plasma processingsystem 150 includes the plasma chamber 152, the RF generator 104, the RFcable 130, the IMC 106, an RF transmission line 154, and the shuntcircuit 108. The plasma chamber 152 is the same as the plasma chamber102 except that the plasma chamber 152 includes a stem 156. Theshowerhead 114, the pedestal 116, and the stem 156 are located withinthe housing of the plasma chamber 152. The top surface 135 of theshowerhead 114 is adjacent to the stem 128 and faces the ceiling 124.

The showerhead 114 is connected to the ceiling 124 via the stem 156. Forexample, the showerhead 114 is supported by the ceiling 124 to which thestem 156 is attached, e.g., bolted, screwed to, etc. The RF transmissionline 154 couples the output O1 of the IMC 106 and extends via the pointP1 and the ceiling 124 into the stem 156 located within a housing of theplasma chamber 152. The housing of the plasma chamber 152 is made of theceiling 124, the side wall 122, and the bottom portion 126. The housingof the plasma chamber 152 is coupled to the ground potential. The RFtransmission line 152 extends into the stem 156 to be connected to thetop electrode 120. An inductance of the RF transmission line 152 isrepresented as L1 c.

The modified RF signal that is supplied at the output O1 of the IMC 106is transferred via the RF transmission line 154 to the top electrode120. A layout of the showerhead 114 and the ceiling 124, e.g., thedistance d2 between the top surface 135 of the showerhead 114 and theceiling 124, creates a parasitic capacitance C11 c between the topsurface 135 of the showerhead 114 and the ceiling 124. Moreover, alayout of the showerhead 114 of the plasma chamber 152 and the side wall122, e.g., a distance between a side surface of the showerhead 114 andthe side wall 122 of the plasma chamber 152, creates another parasiticcapacitance C12 c between the showerhead 114 and the side wall 122 ofthe plasma chamber 152. In some embodiments, a sum of the parasiticcapacitances C11 c and C12 c associated with the plasma chamber 152 isless than a sum of the parasitic capacitances C11 f and C12 f associatedwith the plasma chamber 102. For example, a major difference between thesums is created by a difference between the capacitances C12 f and C12c. The shunt circuit 108 that is connected to the RF transmission line154 at the point P1 increases impedances of low impedance paths createdby the parasitic capacitances C11 c and C12 c so that there is adecrease in the RF current of the modified RF signal through theparasitic capacitances C11 s and C12 c to increase efficiency ofprocessing the wafer 112. By controlling a capacitance of the capacitorCs, or an inductance of the inductor Ls, or both, the impedances of thelow impedance paths are increased to increase the RF voltage of themodified RF signal. Impedances associated with the parasiticcapacitances C11 c and C12 c are negated by increasing the impedances ofthe low impedance paths. For example, the impedances associated with theparasitic capacitances C11 c and C12 c are low. With the use of theshunt circuit 108, the low impedances are negated by increasing the lowimpedances.

FIG. 1C is a diagram of an embodiment of a plasma processing system 170in which a shunt circuit is situated within the housing of a plasmachamber 172. The plasma processing system 170 is the same as the plasmaprocessing system 100 of FIG. 1A except that in the plasma processingsystem 170, the shunt circuit is coupled to a portion of the RFtransmission line 132 that is located inside the housing of the plasmachamber 102. Moreover, the plasma chamber 172 is the same as the plasmachamber 102 (FIG. 1A) except that the plasma chamber 172 includes theinductor Ls of the shunt circuit.

The inductor Ls is connected at a point on the RF transmission line 132between the point P1 on the RF transmission line 132 outside the housingand a point P2 at which the RF transmission line 132 is coupled to thetop electrode 120. For example, the inductor Ls is situated between theshowerhead 114 and the ceiling 124. The inductor Ls is coupled to theground potential at its end E2 and is connected to the point between thepoints P1 and P2 at its end E1. In some embodiments, the inductor Ls iscoupled to the ground potential by being connecting to the ceiling 124or the side wall 122, both of which are at the ground potential. Theinductance of the inductor Ls increases the low impedance between thetop surface 135 of the showerhead 114 and the ceiling 124 and the lowimpedance between the side surface of the showerhead 114 and the sidewall 122 so that the modified RF signal that is output from the IMC 106is transferred via the RF transmission line 132 to the top electrode 120and further to the gap between the showerhead 114 and the pedestal 116.

In various embodiments in which the top electrode 120 is coupled to theground potential instead of the top electrode 120, and the bottomelectrode 118 is coupled to the IMC 106 via the RF transmission line132, a point, similar to the point P2, is located at the bottomelectrode 116 instead of at the top electrode 120. Moreover, the pointP1 is located below the bottom surface 133 of the bottom portion 126.The inductor Ls is coupled between the point P1 and the point located atthe bottom electrode 118, and is located between the bottom portion 126and the pedestal 116.

In some embodiments, the shunt circuit 108 (FIG. 1A) is implementedinside the plasma chamber 172 in place of the inductor Ls. For example,the shunt circuit 108 is connected between the ends E1 and E2 and isplaced between the ceiling 124 of the plasma chamber 172 and theshowerhead 114 of the plasma chamber 172.

FIG. 1D is a diagram of an embodiment of a plasma processing system 180in which a plasma chamber 182 includes a shunt circuit within a housingof a plasma chamber 182. The plasma processing system 180 is the same asthe plasma processing system 152 of FIG. 1B except that in the plasmaprocessing system 180, the shunt circuit is located within the housingof the plasma chamber 182. The plasma chamber 182 is the same as theplasma chamber 152 (FIG. 1B) except that the plasma chamber 182 includesthe inductor Ls of the shunt circuit. The inductor Ls is coupled to apoint between the point P1 and a point P3 at which the RF transmissionline 154 is coupled to the top electrode 120. For example, the inductorLs is situated between the showerhead 114 and the ceiling 124. Thehousing of the plasma chamber 182 is formed by the ceiling 124, the sidewall 122, and the bottom portion 126. The inductor Ls located inside thehousing and is coupled to a portion, of the RF transmission line 154,situated inside the housing of the plasma chamber 182. The inductance ofthe inductor Ls increases the low impedance between the top surface 135of the showerhead 114 and the ceiling 124 and the low impedance betweenthe side surface of the showerhead 114 and the side wall 122 so that themodified RF signal that is output from the IMC 106 is transferred viathe RF transmission line 154 to the top electrode 120 and further to thegap between the showerhead 114 and the pedestal 116.

In various embodiments, the top electrode 120 of the plasma chamber 182is coupled to the ground potential instead of the bottom electrode 116,and the bottom electrode 116 is coupled to the IMC 106 via the RFtransmission line 132. The point P1 is located at the pre-determineddistance below the bottom surface 133 of the bottom portion 126. Theinductor Ls is coupled to a point located between the point P1 and apoint at which the RF transmission line 132 is coupled to the bottomelectrode 116. The inductor Ls is located between the bottom portion 126and the pedestal 116. These embodiments are illustrated below in FIG.1H.

In some embodiments, the shunt circuit 108 (FIG. 1A) is implementedinside the plasma chamber 182 in place of the inductor Ls. For example,the shunt circuit 108 is connected between the ends E1 and E2 and isplaced between the ceiling 124 of the plasma chamber 182 and theshowerhead 114 of the plasma chamber 182.

FIG. 1E is a diagram of an embodiment of a plasma processing system 190to illustrate a coupling of the shunt circuit 108 to the point P1 on theRF transmission line 132 that is coupled to the bottom electrode 118instead of the top electrode 120. The plasma processing system 190 isthe same as the plasma processing system 100 (FIG. 1A) except that theplasma processing system 190 includes a plasma chamber 192 instead ofthe plasma chamber 102 (FIG. 1A). The plasma chamber 192 is aflush-mount type plasma chamber. In the plasma chamber 192, the topelectrode 120 is coupled to the ground potential and the bottomelectrode 118 is coupled to the RF transmission line 132. Moreover, thepedestal 116 is mounted to the side wall 122 via the side mount 138. Theside mount 138 couples the pedestal 116 to the side wall 122. Theparasitic capacitance C12 c is created between the pedestal 116 and theside wall 122 instead of between the showerhead 114 and the side wall122. Also, the showerhead 114 is mounted from the ceiling 124 via thestem 156.

Moreover, the shunt circuit 108 is coupled to the point P1 on the RFtransmission line 132 to increase impedance associated with, e.g.,generated by, a parasitic capacitance between the pedestal 116 and theside wall 122 and to increase impedance generated by a parasiticcapacitance between the pedestal 116 and the top surface 131 of thebottom portion 126. The point P1 is located at the pre-determineddistance from the bottom portion 126 instead of being located at thepre-determined distance from the ceiling 124. The end E2 of the shuntcircuit 108 is coupled to the ground potential by being coupled to thebottom surface 133 of the bottom portion 126 of the housing of theplasma chamber 192. The shunt circuit 108 faces the bottom surface 133of the bottom portion 126.

FIG. 1F is a diagram of an embodiment of a plasma processing system 194to illustrate a coupling of the shunt circuit 108 to the point P1 on theRF transmission line 132 that is coupled to the bottom electrode 118instead of the top electrode 120. The plasma processing system 194 isthe same as the plasma processing system 150 (FIG. 1B) except that theplasma processing system 194 includes a plasma chamber 196 instead ofthe plasma chamber 152 (FIG. 1B). In the plasma chamber 196, which is achandelier-type plasma chamber, the top electrode 120 is coupled to theground potential and the bottom electrode 118 is coupled to the RFtransmission line 132. The end E2 of the shunt circuit 108 is coupled tothe ground potential by being coupled to the bottom surface 133 of thebottom portion 126 of the housing of the plasma chamber 196.

FIG. 1G is a diagram of an embodiment of a plasma processing system 195to illustrate use of the inductor Ls to increase impedance associatedwith parasitic capacitance of a plasma chamber 197. The plasmaprocessing system 195 is the same as the plasma processing system 190(FIG. 1E) except that in the plasma processing system 195, the inductorLs is coupled between the point P1 on the RF transmission line 132coupled to the bottom electrode 118 and a point P4 at the bottomelectrode 118.

In the plasma chamber 197, the RF transmission line 132 is coupled tothe point P4 at the bottom electrode 118 and the end E1 of the inductorLs is coupled to the RF transmission line 132 between the points P1 andP4. The end E2 of the inductor L2 is coupled to the ground potential.For example, the end E2 is coupled to the top surface 131 of the bottomportion 126. In some embodiments, the end E2 of the inductor Ls iscoupled to the side wall 122. The inductor Ls increases the impedanceassociated with the parasitic capacitance between the pedestal 116 andthe side wall 122 and the parasitic capacitance between the pedestal 116and the bottom portion 126.

In some embodiments, the shunt circuit 108 (FIG. 1A) is implementedinside the plasma chamber 197 in place of the inductor Ls. For example,the shunt circuit 108 is connected between the ends El and E2 betweenthe bottom portion 126 of the plasma chamber 197 and the pedestal 116 ofthe plasma chamber 197.

FIG. 1H is a diagram of an embodiment of a plasma processing system 198to illustrate use of the inductor Ls to increase impedance associatedwith parasitic capacitance of a plasma chamber 199. The plasmaprocessing system 198 is the same as the plasma processing system 180(FIG. 1D) except that the plasma processing system 198 has the plasmachamber 199 and the inductor Ls is coupled between the point P1 on theRF transmission line 132 coupled to the bottom electrode 118 and a pointP5 at the bottom electrode 118. In the plasma chamber 199, the RFtransmission line 132 is coupled to the point P5 at the bottom electrode118 and the end E1 of the inductor Ls is coupled to the RF transmissionline 132 between the points P1 and P5.

In some embodiments, the shunt circuit 108 (FIG. 1A) is implementedinside the plasma chamber 199 in place of the inductor Ls. For example,the shunt circuit 108 is connected between the ends E1 and E2 betweenthe bottom portion 126 of the plasma chamber 199 and the pedestal 116 ofthe plasma chamber 199.

FIG. 2 is a diagram of an embodiment of a plasma processing system 200,which is an example of the PECVD system used to process the wafer 112.The plasma processing system 200 includes a plasma chamber 202 having alower chamber portion 202 b and an upper chamber portion 202 a. Theplasma chamber 202 is an example of the plasma chamber 102 (FIG. 1A).

A center column is configured to support the pedestal 116. The centercolumn is also shown to include lift pins 220, which are controlled by alift pin control 222. The lift pins 220 are used to raise the wafer 112from the pedestal 116 to allow an end-effector to pick the wafer 112 andto lower the wafer 112 after being placed by the end end-effector.

The plasma chamber 202 further includes a showerhead 250 located abovethe pedestal 116 for processing the wafer 112. The showerhead 250 is anexample of the showerhead 114 (FIG. 1A). The showerhead 250 iselectrically coupled to the IMC 106. The IMC 106 is coupled to multipleradio frequency (RF) generators 204. The RF generators 204 arecontrolled by a system controller 210. Examples of a controller includea processor and a memory device. A processor, as described herein, is anapplication specific integrated circuit (ASIC), a programmable logicdevice (PLD), a central processing unit (CPU), or a microprocessor, etc.Examples of a memory device, as described herein, include a read-onlymemory (ROM), a random access memory (RAM), a redundant array of storagedisks, a hard disk, a Flash memory, etc. The system controller 210operates the plasma processing system 200 by executing a process inputand control 208. The process input and control 208 includes processrecipes, such as power levels, timing parameters, process gasses,mechanical movement of the wafer 112, etc., so as to deposit or formfilms over the wafer 112.

The plasma processing system 200 further includes a gas supply manifold212 that is connected to process gases 214, e.g., gas chemistry suppliesfrom a facility, etc. Depending on the processing being performed, thesystem controller 210 controls a delivery of the process gases 214 viathe gas supply manifold 212. The chosen process gases are then flowninto the showerhead 250 and distributed in a space volume, e.g., thegap, etc., defined between the showerhead 250 face that faces that wafer112 and the pedestal 116.

Further, in some embodiments, the process gases 214 are premixed or not.Appropriate valving and mass flow control mechanisms are employed toensure that the correct process gases are delivered during depositionand plasma treatment phases of the process. The process gases 214 exitthe plasma chamber 202 via an outlet. A vacuum pump, e.g., a one or twostage mechanical dry pump, a turbomolecular pump, etc., draws processgases out and maintains a suitably low pressure within the plasmachamber 202 by a close loop controlled flow restriction device, such asa throttle valve or a pendulum valve.

Also shown is a carrier ring 251 that encircles an outer region of thepedestal 116. The carrier ring 251 sits over a carrier ring supportregion that is a step down from a wafer support region in the center ofthe pedestal 216. The carrier ring 251 includes an outer edge side ofits disk structure, e.g., outer radius, etc., and a wafer edge side ofits disk structure, e.g., inner radius, etc., that is closest to wherethe wafer 112 sits. The wafer edge side of the carrier ring 251 includesa plurality of contact support structures which lift the wafer 112 whenthe carrier ring 251 is lifted by multiple spider forks 280. The carrierring 251 is therefore lifted along with the wafer 112 and is rotated toanother station, e.g., in a multi-station system.

The shunt circuit 108 is coupled to the point P1 located within thepredetermined distance above the portion 202 a of the plasma chamber202. In some embodiments, the point P1 is closer to the portion 202 acompared to the IMC 106. The shunt circuit 108 is coupled to the groundpotential at the end E2 and the end E1 of the shunt circuit 108 iscoupled to the point P1 on the RF transmission line 132. The shuntcircuit 108 increases impedance between the showerhead 250 and theportion 202 a of the plasma chamber 202. The increase in the impedanceincreases voltage at the output O1 of the IMC 106. The increase in thevoltage increases power of the modified RF signal transferred via the RFtransmission line 132 towards the gap between the showerhead 250 and thepedestal 116.

FIG. 3 illustrates a top view of a multi-station processing tool, wherefour processing stations, which are station 1, station 2, station 3, andstation 4, are provided. The plasma chamber 202 (FIG. 2) is an exampleof each of the four processing stations 1 through 4. Wafers 112 beingprocessed on the four stations are accessed by the spider forks 280. Inone embodiment, there is no isolation wall or other mechanism to isolateone station from another. Each spider fork 280 includes a first andsecond arm, each of which is positioned around a portion of each side ofthe pedestal 116. In this view, the spider forks 280 are drawn indash-lines, to convey that they are below the carrier ring 251. Thespider forks 280, using an engagement and rotation mechanism 320, raiseup and lift the carrier rings 251 from a lower surface of the carrierrings 251 from the stations 1 through 4 simultaneously, and then rotatebetween two or more stations 1 through 4 before lowering the carrierrings 251. During the rotation, at least one of the carrier rings 251supports the wafer 112 to a next location so that further plasmaprocessing, treatment and/or film deposition takes place on the wafer112.

FIG. 4 shows a schematic view of an embodiment of a multi-stationprocessing tool 400 with an inbound load lock 402 and an outbound loadlock 404. A robot 406, at atmospheric pressure, moves substrates, e.g.,the wafer 112, etc., from a cassette loaded through a pod 408 into theinbound load lock 402 via an atmospheric port 410. The inbound load lock402 is coupled to a vacuum source (not shown) so that, when atmosphericport 410 is closed, the inbound load lock 402 is pumped down. Theinbound load lock 402 also includes a chamber transport port 416interfaced with one of the stations 1 through 4. Thus, when the chambertransport 416 is open, another robot (not shown) moves the wafer 112from the inbound load lock 402 to the pedestal 116 of the station 1 forprocessing. The multi-station processing toll 400 includes themulti-station processing tool illustrated using FIG. 3.

In some embodiments, a low pressure environment is maintained in anenclosure that encloses the stations 1 through 4 so that substrates aretransferred using the carrier ring 251 among the stations 1 through 4without experiencing a vacuum break and/or air exposure. Each of thestations 1 through 4 includes a process station substrate holder andprocess gas delivery line inlets.

The spider forks 280 transfer substrates among the stations 1 through 4.The spider forks 280 rotate and enable transfer of the wafer 112 fromone of the stations 1 through 4 to another one of the stations 1 through4. The transfer occurs by enabling the spider forks 280 to lift thecarrier rings 251 from an outer undersurface, which lifts the wafer 112,and rotates the wafer 112 and the carrier ring 251 together to the nextstation. In one configuration, the spider forks 280 are made from aceramic material to withstand high levels of heat during processing.

In various embodiments, a number of stations other than four is used.For example, three or two or five plasma processing stations are used toprocess the wafer 112.

FIG. 5A is a diagram of an embodiment of a system 500 to illustrate useof a shunt circuit 502 to negate impedances associated with parasiticcapacitances. The system 500 includes the RF generator 104, the IMC 106,the VI probe 110, an inductor L1, a parasitic capacitance C1, the shuntcircuit 502, the capacitor C2, the inductor L2, and impedance Z_plasmaof plasma formed within the gap between the showerhead 114 and thepedestal 116. The parasitic capacitance C1 represents a sum of theparasitic capacitances C11 f and C12 f a the flush-mount type plasmachamber. In some embodiments, the parasitic capacitance C1 represents asum of the parasitic capacitances C11 c and C12 c for a chandelier-typeplasma chamber. Also, the inductor L1 has the inductor L1 f of the RFtransmission line 132 (FIG. 1A). In some embodiments, the inductor L1has the inductor L1 c of the RF transmission line 152 (FIG. 1B).

The IMC 106 is coupled to the inductor L1, which is coupled to via theparasitic capacitance C1 to the ground potential. Moreover, the VI probe110 is coupled to the output O1 of the IMC 106. The end E1 of theinductor Ls of the shunt circuit 502 is coupled to the point P1 on an RFtransmission line, e.g., the RF transmission line 132, the RFtransmission line 152, etc. The point P1 is coupled to a top plate ofthe capacitor C2. The top plate represents the showerhead 114 (FIG. 1A).A bottom plate of the capacitor C2 is coupled to the inductor L2. Thebottom plate represents the pedestal 116 (FIG. 1A). The impedanceZ_plasma is within the gap between the showerhead 114 and the pedestal116. The impedance Z_plasma is parallel to the capacitor C2 and both thecapacitor C2 and the impedance Z_plasma are coupled to the inductor L2,which is coupled to the ground potential.

The shunt circuit 502 is coupled in parallel to the parasiticcapacitance C1. By controlling the inductance of the inductor Ls,impedance of the parasitic capacitance C1 is controlled to increase theimpedance so that there is an increase in an amount of RF voltage at theoutput O1 and an increase in an amount of RF voltage of the modified RFsignal that is supplied via the RF transmission line, e.g., the RFtransmission line 132 (FIG. 1A), the RF transmission line 154 (FIG. 1B),etc., to the top plate of the capacitor C2. The increase in the amountof the RF voltage of the modified RF signal increases efficiency of aplasma process, e.g., deposition, cleaning, etc., being performed by aplasma chamber.

FIG. 5B is a diagram of an embodiment of a system 510 to illustrate ashunt circuit 512 having a variable inductor Lvs. An inductance value ofthe inductor Lvs is the same as that of the inductor Ls. The system 510is the same as the system 500 (FIG. 5A) except that in the system 520,the inductor Ls is replaced by the variable inductor Lvs. The variableinductor Lvs is coupled between the ends E1 and E2, and is parallel tothe parasitic capacitance C1. An inductance of the variable inductor Lvsis modified to increase impedance generated as a result of the parasiticcapacitance C1. The increase in the impedance increases an amount of RFvoltage of the modified RF signal flowing towards the top plate of thecapacitor C2 to increase plasma processing efficiency.

FIG. 5C is a diagram of an embodiment of a system 520 to illustrate theshunt circuit 108 coupled between the ends E1 and E2. The system 520 isthe same as the system 500 (FIG. 5A) except that in the system 520, theinductor Ls is coupled in parallel with the capacitor Cs. The end E1 ofthe shunt circuit 108 is coupled to the point P1 between the inductor L1and the capacitor C2. The other end E2 of the shunt circuit 108 iscoupled to the ground potential.

Both the inductor Ls and the capacitor Cs are coupled in parallel withthe parasitic capacitance C1. The parallel coupling increases animpedance of the parasitic capacitance C1 to increase RF voltage at theoutput O1. Also, a capacitance of the capacitor Cs is changed toincrease the RF voltage at the output O1. The increase in the RF voltageat the output O1 increases efficiency in processing the wafer 112.

FIG. 5D is a diagram of an embodiment of a system 530 in which a shuntcircuit 532 having a fixed capacitor Cfs and the variable inductor Lvsis used. The fixed capacitor Cfs has the same capacitance values as thecapacitor Cs. The system 530 is the same as the system 520 (FIG. 5B)except that in the system 530, the variable inductor Lvs is coupled inparallel with the fixed capacitor Cfs. The shunt circuit 532 includesthe fixed capacitor Cfs in parallel with the variable inductor Lvs. Theshunt circuit 532 is coupled between the ends E1 and E2.

Also, both the fixed capacitor Cfs and the variable inductor Lvs arecoupled in parallel to the parasitic capacitance C1. The parallelcoupling increases an impedance of the parasitic capacitance C1 toincrease RF voltage at the output O1. Also, an inductance of thevariable inductor Lvs is changed to increase the RF voltage at theoutput O1.

FIG. 5E is a diagram of an embodiment of a system 540 to illustrate useof the capacitor Cs and the variable inductor Lvs in a shunt circuit542. The system 540 is the same as the system 530 (FIG. 5C) except thatin the system 540, the variable inductor Lvs is coupled in parallel withthe capacitor Cs. The shunt circuit 542 is coupled between the ends E1and E2. The capacitor Cs and the variable inductor Lvs are coupled inparallel to the parasitic capacitor C1.

Inductance of the variable inductor Lvs and the capacitance of thecapacitor Cs are varied to increase the impedance generated as a resultof the parasitic capacitor C1. The increase in the impedance increasesRF voltage at the point O1 to increase the RF voltage of the modifiedoutput signal that is output from the IMC 106.

In some embodiments, an inductance of the inductor Ls is fixed whenduring processing of the wafer 112, the inductance is not modifiedeither manually or by using a motor. In various embodiments, acapacitance of the capacitor Cfs is fixed when during processing of thewafer 112, the capacitance is not modified either manually or by using amotor.

FIG. 6A is a diagram of an embodiment of a system 600 to illustrate achange in capacitance of the capacitor Cs of the shunt circuit 108 untila parameter at the output O1 of the IMC 106 is within a pre-determinedrange. Examples of the parameter are provided below. The system 600includes the IMC 106, the VI probe 110, the shunt circuit 108, a motorM1, a driver D1, and a host computer 902. The host computer 902 includesa processor 904 and a memory device 906. Examples of the host computer902, the processor 904, and the memory device 906 are provided below.Also, examples of the driver D1 and the motor M1 are provided below.

The processor 904 is coupled to the driver D1, which is coupled to themotor M1. The motor M1 is coupled via a connection mechanism to thecapacitor Cs. Examples of the connection mechanism are provided below.Also, the VI probe 110 that is coupled to the output O1 of the IMC 106is coupled to the processor 904 via a transfer cable, examples of whichare provided below.

The processor 904 receives a measurement of the parameter from the VIprobe 110 coupled to the output O1 and determines whether the parameteris within the pre-determined range. Upon determining that the parameteris not within the pre-determined range, the processor 904 sends acommand signal to the driver D1. Upon receiving the command signal, thedriver D1 generates a current signal to send to the motor M1. The motorM1 operates to change a capacitance of the capacitor Cs. For example,when a stator of the motor M1 receives the current signal, a rotor ofthe motor M1 rotates to change an area between two parallel plates ofthe capacitor Cs or to change a distance between the two plates. Thechange in the capacitance of the capacitor Cs changes the parametermeasured by the VI probe 110 that is coupled to the output O1. In such amanner, the processor 194 continues to control the capacitor Cs untilthe parameter is within the pre-determined range. On the other hand,upon determining that the parameter is within the pre-determined range,the processor 904 does not send a command signal to the driver D1. Whenthe command signal is not received by the driver D1, the driver D1 doesnot generate the current signal and the capacitance of the capacitor Csdoes not change.

FIG. 6B is a diagram of an embodiment of a system 610 to illustrate achange in an inductance of the inductor Lvs of the shunt circuit 532until the parameter is within a pre-determined span. The system 610includes the IMC 106, the VI probe 110, the shunt circuit 532, the motorM1, the driver D1, and the host computer 902. The motor M1 is coupledvia a connection mechanism to the inductor Lvs.

The processor 904 receives a measurement of the parameter from the VIprobe 110 coupled to the output O1 and determines whether the parameteris within the pre-determined span. Upon determining that the parameteris not within the pre-determined span, the processor 904 sends a commandsignal to the driver D1. Upon receiving the command signal, the driverD1 generates a current signal to send to the motor M1. The motor M1operates to change an inductance of the inductor Lvs. For example, whenthe stator of the motor M1 receives the current signal, the rotor of themotor M1 rotates to change an amount by which a core of the inductor Lvsis surrounded by windings of the inductor Lvs. The change in theinductance of the inductor Lvs changes the parameter measured by the VIprobe 110 that is coupled to the output O1. The processor 194 continuesto control the inductor Lvs until the parameter is within thepre-determined span. On the other hand, upon determining that theparameter is within the pre-determined span, the processor 904 does notsend a command signal to the driver D1. When the command signal is notreceived by the driver D1, the driver D1 does not generate the currentsignal and the inductance of the inductor Lvs does not change.

FIG. 6C is a diagram of an embodiment of a system 620 to illustrate achange in a capacitance of the capacitor Cs and an inductance of theinductor Lvs of the shunt circuit 542 until the parameter is within apre-determined extent. The system 620 includes the IMC 106, the VI probe110, the shunt circuit 542, the motor M1, the driver D1, a motor M2, adriver D2, and the host computer 902. The motor M2 is coupled via aconnection mechanism to the capacitor Cs. Moreover, the driver D2 iscoupled to the motor M2 and is coupled to the processor 904.

The processor 904 receives a measurement of the parameter from the VIprobe 110 coupled to the output O1 and determines whether the parameteris within the pre-determined extent. Upon determining that the parameteris not within the pre-determined extent, the processor 904 sends commandsignals to the drivers D1 and D2. Upon receiving one of the commandsignals, the driver D1 generates a current signal to send to the motorM1 and upon receiving another one of the command signals, the driver D2generates a current signal to send to the motor M2. The motor M1operates to change an inductance of the inductor Lvs and the motor M2operates to change a capacitance of the capacitor Cs. For example, whenthe stator of the motor M1 receives the current signal, the rotor of themotor M1 rotates to change an amount by which a core of the inductor Lvsis surrounded by windings of the inductor Lvs. The change in theinductance of the inductor Lvs changes the parameter measured by the VIprobe 110 that is coupled to the output O1. Also, when a stator of themotor M2 receives the current signal, a rotor of the motor M2 rotates tochange an area between two parallel plates of the capacitor Cs or tochange a distance between the two plates. The change in the capacitanceof the capacitor Cs changes the parameter measured by the VI probe 110that is coupled to the output O1. The processor 194 continues to controlthe inductor Lvs and the capacitor Cs until the parameter is within thepre-determined extent. On the other hand, upon determining that theparameter is within the pre-determined extent, the processor 904 doesnot send the command signals to the drivers D1 and D2. When the commandsignal is not received by the driver D1, the driver D1 does not generatethe current signal and the inductance of the inductor Lvs does notchange. Similarly, when the command signal is not received by the driverD2, the driver D2 does not generate the current signal and thecapacitance of the capacitor Cs does not change.

FIG. 6D is an embodiment of a graph 650 to illustrate a difference inimpedances with and without use of a shunt circuit. The graph 650 plotsa magnitude of impedance calculated from voltage and current measuredusing the VI probe 110 at the output O1 (FIG. 1A) of the IMC 106 (FIG.1A) versus a frequency of the RF generator 104 (FIG. 1A). The graph 650has two plots 652 and 654. The plot 652 represents impedance calculatedfrom voltage and current measured using the VI probe 100 at the outputO1 when the shunt circuit, e.g., the shunt circuit 108 or the shuntcircuit 502 or the shunt circuit 512 or the shunt circuit 532 or theshunt circuit 542 (FIGS. 5A-5E), is not connected to the point P1.Moreover, the plot 654 represents impedance calculated from voltage andcurrent measured using the VI probe 100 at the output O1 when the shuntcircuit is connected to the point P1. The plot 654 represents impedanceassociated with parasitic paths, e.g., an impedance associated with theparasitic capacitances C11 f and C12 f, an impedance associated with theparasitic capacitances C11 c and C12 c. An impedance value IV1 plottedon the plot 654 is greater than an impedance value IV2 plotted on theplot 652. Both the impedance values IV1 and IV2 corresponding to afrequency of operation of 13.56 MHz of the RF generator 104. Forexample, both the impedance values are measured when the RF generator104 operates at the frequency of 13.56 MHz.

In some embodiments, the shunt circuit is referred to herein as acancellation circuit.

FIG. 6E is an embodiment of a table 660 to illustrate measurements bythe VI probe 110 of voltage, current, phase, and power of the RF signalmeasured by the VI probe 110 at the output O1 without use of a shuntcircuit and with use of the shunt circuit. The table 660 includes acolumn 1 showing a voltage of the modified RF signal at the output O1, acurrent of the modified RF signal at the output O1, a phase of themodified RF signal at the output O1, and a power of the modified RFsignal at the output O1. A column 2 of the table 600 is generated whenthe shunt circuit is not connected to the point P1.

Moreover, the table 660 includes a column 3 showing a voltage of themodified RF signal at the output O1, a current of the modified RF signalat the output O1, a phase of the modified RF signal at the output O1,and a power of the modified RF signal at the output O1. The column 3 isgenerated when the shunt circuit is connected to the point P1 and thecapacitance of the capacitor Cs is 4 picoFarads.

Also, the table 660 includes a column 4 showing a voltage of themodified RF signal at the output O1, a current of the modified RF signalat the output O1, a phase of the modified RF signal at the output O1,and a power of the modified RF signal at the output O1. The column 4 isgenerated when the shunt circuit is connected to the point P1 and thecapacitance of the capacitor Cs is 70 picoFarads.

It should be noted that there is an increase in voltage of the modifiedRF signal at the output O1 with use of the shunt circuit compared tovoltage of the modified RF signal at the output O1 when the shuntcircuit is not used. Moreover, there is a decrease in a current of themodified RF signal at the output O1 with use of the shunt circuitcompared to RF current of the modified RF signal at the output O1 whenthe shunt circuit is not used. Also, there is a decrease in a phase ofthe modified RF signal at the output O1 with use of the shunt circuitcompared to a phase of the modified RF signal at the output O1 when theshunt circuit is not used. There is an increase in power at the outputO1 with use of the shunt circuit compared to power of the modified RFsignal at the output O1 when the shunt circuit is not used.

FIG. 7 is a diagram of an embodiment of a system 700 for illustratinguse of a shunt circuit with each of the stations 1 through 4. The system700 includes the RF generator 104, the IMC 106, a power splitter 702,the stations 1 through 4, and shunt circuits 704A, 704B, 704C, and 704D.An example of the power splitter 702 is provided in application Ser. No.15/254,769, filed on Sep. 9, 2016, and titled “COMBINER AND DISTRIBUTORFOR ADJUSTING IMPEDANCES OR POWER ACROSS MULTIPLE PLASMA PROCESSINGSTATIONS”, which is incorporated by reference herein in its entirety. Asan illustration, the power splitter 702 includes a network of inductors,or capacitors, or resistors, or a combination of two or more thereof, todistribute, e.g., split, power of the modified RF signal to outputmultiple modified RF output signals.

The IMC 106 is coupled to the power splitter 702 via an RF cable 708.The power splitter 702 is coupled to the top electrode 120 of thestation 1 via an RF transmission line 704A, is coupled to the topelectrode 120 of the station 2 via an RF transmission line 704B, iscoupled to the top electrode 120 of the station 3 via an RF transmissionline 704C, and is coupled to the top electrode 120 of the station 4 viaan RF transmission line 704D. The RF transmission line 704A is coupledto an output O2 of the power splitter 702. Similarly, the RFtransmission line 704B is coupled to an output O3 of the power splitter702, the RF transmission line 704C is coupled to an output O4 of thepower splitter 702, and the RF transmission line 704D is coupled to anoutput O5 of the power splitter 702. As an example, the output O2 iscoupled to a first branch circuit of the power splitter 702, the outputO3 is coupled to a second branch circuit of the power splitter 702, theoutput O4 is coupled to a third branch circuit of the power splitter702, and the output O5 is coupled to a fourth branch circuit of thepower splitter 702. In some embodiments, each branch circuit of thepower splitter 702 includes a network of circuit components, e.g.,inductors, capacitors, resistors, etc., that are coupled to each other.The branches of the power splitter 702 connect to each other to receivethe modified RF signal from the IMC 106 and to split power of themodified RF signal.

The shunt circuit 704A is coupled to the RF transmission line 704A atthe point P1 on the RF transmission line 704A. Similarly, the shuntcircuit 704B is coupled to the RF transmission line 704B at the point P1on the RF transmission line 704B, the shunt circuit 704C is coupled tothe RF transmission line 704C at the point P1 on the RF transmissionline 704C, and the shunt circuit 704D is coupled to the RF transmissionline 704A at the point P1 on the RF transmission line 704D.

Moreover, the end E1 of the shunt circuit 704A is coupled to the pointP1 on the RF transmission line 706A and the end E2 of the shunt circuit704A is coupled to housing of the station 1, e.g., the outer surface 125of the ceiling 124 of the station 1, to be coupled to the groundpotential. Similarly, the end E1 of the shunt circuit 704B is coupled tothe point P1 on the RF transmission line 706B and the end E2 of theshunt circuit 704B is coupled to housing of the station 2, e.g., theouter surface 125 of the ceiling 124 of the station 2, to be coupled tothe ground potential. The end E1 of the shunt circuit 704C is coupled tothe point P1 on the RF transmission line 706C and the end E2 of theshunt circuit 704C is coupled to housing of the station 3, e.g., theouter surface 125 of the ceiling 124 of the station 3, to be coupled tothe ground potential. Similarly, the end E1 of the shunt circuit 704D iscoupled to the point P1 on the RF transmission line 706D and the end E2of the shunt circuit 704D is coupled to housing of the station 4, e.g.,the outer surface 125 of the ceiling 124 of the station 4, to be coupledto the ground potential.

Each of the RF transmission lines 706A, 706B, 706C, and 706D is anexample of the RF transmission line 132 (FIG. 1A). In some embodiments,each of the RF transmission lines 706A, 706B, 706C, and 706D is anexample of the RF transmission line 154 (FIG. 1B).

Moreover, the shunt circuit 502 (FIG. 5A) is an example of each of theshunt circuits 704A, 704B, 704C, and 704D. In some embodiments, theshunt circuit 512 (FIG. 5B) is an example of each of the shunt circuits704A, 704B, 704C, and 704D. In various embodiments, the shunt circuit108 (FIG. 5C) is an example of each of the shunt circuits 704A, 704B,704C, and 704D. In several embodiments, the shunt circuit 532 (FIG. 5D)is an example of each of the shunt circuits 704A, 704B, 704C, and 704D.In some embodiments, the shunt circuit 542 (FIG. 5E) is an example ofeach of the shunt circuits 704A, 704B, 704C, and 704D.

The modified RF signal that is output at the output 01 of the IMC 106 isprovided to the power splitter 702. The power splitter 702 splits powerof the modified RF signal to generate the multiple modified RF outputsignals. For example, one of the RF output signals is sent via the RFtransmission line 706A to the top electrode 120 of the station 1.Another one of the modified RF output signals is sent via the RFtransmission line 706B to the top electrode 120 of the station 2. Yetanother one of the modified RF output signals is sent via the RFtransmission line 706C to the top electrode 120 of the station 3.Another one of the modified RF output signals is sent via the RFtransmission line 706D to the top electrode 120 of the station 4.

The shunt circuit 704A increases an impedance generated as a result of aparasitic capacitance of the station 1 to improve an efficiency andyield of a plasma process performed on the wafer 112 at the station 1.Similarly, the shunt circuit 704B increases an RF voltage at the pointP1 on the RF transmission line 706B to increase an impedance the pointP1 so that an effect of a parasitic capacitance of the station 2 isreduced. Moreover, the shunt circuit 704C increases an RF voltage at thepoint P1 on the RF transmission line 706C and reduces an RF current atthe point P1 on the RF transmission line 706C to increase an impedanceat the point P1 on the RF transmission line 706C. Also, the shuntcircuit 704D increases an impedance at the point P1 to direct, e.g.,increase, power of the modified RF output signal towards the gap betweenthe showerhead 114 and the pedestal 116.

FIG. 8A is an embodiment of a graph 800 to illustrate impedanceassociated with parasitic capacitance within the stations 1 through 4when a shunt circuit is not used with any of the stations 1 through 4.The graph 800 plots a magnitude of the impedance associated withparasitic capacitance on a y-axis and a frequency of operation of the RFgenerator 104 (FIG. 1A) on an x-axis. As shown, for the frequency ofoperation of 13.56 MHz, the impedance associated with parasiticcapacitance at each of the stations 1 through 4 is IV2, which is low.

FIG. 8B is an embodiment of a graph 810 to illustrate a negation ofimpedance associated with parasitic capacitance within the stations 1through 4 when a shunt circuit is used with the stations 1 through 4.When a shunt circuit is coupled to the stations 3 and 4, as shown above,the impedance value IV2 increases to IV1. Similarly, when a shuntcircuit is coupled to the stations 1 and 2, as shown above, theimpedance value IV2 increases to IV3. As such, by increasing impedanceassociated with parasitic capacitances associated with the stations 1through 4, there is an increase RF power used to process the wafer 112at the stations 1 through 4.

FIG. 8C is an embodiment of a table 820 to illustrate an amount ofvoltage associated with parasitic capacitance at each of the stations 1through 4 when a shunt circuit is not used with any of the stations 1through 4. The table 820 has a voltage measured at the output O2 of thepower splitter 702 (FIG. 7), a voltage measured at the output O3 of thepower splitter 702, a voltage measured at the output 04 of the powersplitter 702, and a voltage measured at the output O5 of the powersplitter 702.

Moreover, the table 820 has a current measured at the output 02 of thepower splitter 702, a current measured at the output O3 of the powersplitter 702, a current measured at the output O4 of the power splitter702, and a current measured at the output O5 of the power splitter 702.Also, the table 820 plots a phase and power of the modified output RFsignal at the output O2, a phase and power of the modified output RFsignal at the output O3, a phase and power of the modified output RFsignal at the output O4, and a phase and power of the modified output RFsignal at the output O5.

FIG. 8D is an embodiment of a table 840 to illustrate a change involtages, currents, phases, and power when a shunt circuit is used atthe stations 1 through 4. As illustrate, voltage at the outputs O2through O5 increases when the shunt circuit is used at each of thestations 1 through 4 compared to when the shunt circuit is not used.Moreover, there is a decrease in currents at the outputs O2 through O5when the shunt circuit is used at each of the stations 1 through 4compared to when the shunt circuit is not used. Also, there is anincrease in power of the modified RF output signals at the outputs O2through O5 when the shunt circuit is used at each of the stations 1through 4 compared to when the shunt circuit is not used.

FIG. 9A is a diagram of an embodiment of a multi-station system 900 fornegating impedances associated with parasitic capacitances of thestations 1 through 4 by modifying capacitances of the capacitors Cs ofthe shunt circuit 108. The multi-station system 900 includes the powersplitter 702, multiple VI probes 110, multiple shunt circuits 108,multiple motors M1, M2, M3, and M4, multiple drivers D1, D2, D3, and D4,and the host computer 902. Examples of the host computer 902 include alaptop computer, a desktop computer, a cell phone, or a tablet. Examplesof each driver, described herein, includes one or more transistors.Examples of each motor, described herein, includes a direct current (DC)motor, an alternating current (AC) motor, an electric motor, etc. Thehost computer 902 includes the processor 904 that is coupled to thememory device 906.

The VI probe 110 is coupled to the output O2, another VI probe 110 iscoupled to the output 03, yet another VI probe 110 is coupled to theoutput 04, and another VI probe 110 is coupled to the output 05.Moreover, the processor 904 is coupled to the drivers D1 through D4. Thedriver D1 is coupled to the motor M1. Similarly, the driver D2 iscoupled to the motor M2, the driver D3 is coupled to the motor M3 andthe driver D4 is coupled to the motor M4.

The motor M1 is coupled via a connection mechanism, e.g., one or morerods, a combination of one or more rods and one or more gears, etc., tothe capacitor Cs of the shunt circuit 108 coupled to the point P1 on theRF transmission line 706A. Similarly, the motor M2 is coupled via aconnection mechanism to the capacitor Cs of the shunt circuit 108coupled to the point P1 on the RF transmission line 706B, the motor M3is coupled via a connection mechanism to the capacitor Cs of the shuntcircuit 108 coupled to the point P1 on the RF transmission line 706C,and the motor M4 is coupled via a connection mechanism to the capacitorCs of the shunt circuit 108 coupled to the point P1 on the RFtransmission line 706D.

Also, the processor 904 is coupled to each of the VI probes 110 that arecoupled to the outputs O2 through O5. For example, the processor 904 iscoupled to the VI probe 110, coupled to the output O2, via a transfercable, e.g., a serial transfer cable for transferring measurements in aserial order, a parallel transfer cable for transferring measurements ina parallel manner, a universal serial bus (USB) cable for transferringthe measurements, etc. As another example, the processor 904 is coupledto the VI probe 110, coupled to the output O3, via a transfer cable.Moreover, the processor 904 is coupled to the VI probe 110, coupled tothe output O4, via a transfer cable, and the processor 904 is coupled tothe VI probe 110, coupled to the output O5, via a transfer cable.

The processor 904 receives a measurement of the parameter, e.g.,voltage, current, power, impedance, etc., from the VI probe 110 coupledto the RF transmission line 706A and determines whether the parameter iswithin a first pre-determined range. Upon determining that the parameteris not within the first pre-determined range, the processor 904 sends acommand signal to the driver D1. Upon receiving the command signal, thedriver D1 generates a current signal to send to the motor M1. The motorM1 operates to change a capacitance of the capacitor Cs coupled to thestation 1. For example, when the stator of the motor M1 receives thecurrent signal, the rotor of the motor M1 rotates to change an areabetween two parallel plates of the capacitor Cs that is coupled to thepoint P1 on the RF transmission line 706A or to change a distancebetween the two plates. The change in the capacitance of the capacitorCs changes the parameter measured by the VI probe 110 that is coupled tothe output O2. In such a manner, the processor 194 continues to controlthe capacitor Cs coupled to the station 1 until the parameter is withinthe first pre-determined range. On the other hand, upon determining thatthe parameter is within the first pre-determined range, the processor904 does not send a command signal to the driver D1. When the commandsignal is not received by the driver D1, the driver D1 does not generatethe current signal and the capacitance of the capacitor Cs coupled tothe station 1 does not change.

Similarly, the processor 904 receives a measurement of the parameterfrom the VI probe 110 coupled to the RF transmission line 706B anddetermines whether the parameter is within a second pre-determinedrange. Upon determining that the parameter is not within the secondpre-determined range, the processor 904 sends a command signal to thedriver D2. Upon receiving the command signal, the driver D2 generates acurrent signal to send to the motor M2. The motor M2 operates to changea capacitance of the capacitor Cs coupled to the station 2. The changein the capacitance of the capacitor Cs changes the parameter measured bythe VI probe 110 that is coupled to the output O3. In such a manner, theprocessor 194 continues to control the capacitor Cs coupled to thestation 2 until the parameter is within the second pre-determined range.On the other hand, upon determining that the parameter is within thesecond pre-determined range, the processor 904 does not send a commandsignal to the driver D2. When the command signal is not received by thedriver D2, the driver D2 does not generate the current signal and thecapacitance of the capacitor Cs coupled to the station 2 does notchange.

Also, the processor 904 receives a measurement of the parameter from theVI probe 110 coupled to the RF transmission line 706C and determineswhether the parameter is within a third pre-determined range. Upondetermining that the parameter is not within the third pre-determinedrange, the processor 904 sends a command signal to the driver D3. Uponreceiving the command signal, the driver D3 generates a current signalto send to the motor M3. The motor M3 operates to change a capacitanceof the capacitor Cs coupled to the station 3. The change in thecapacitance of the capacitor Cs changes the parameter measured by the VIprobe 110 that is coupled to the output O4. In such a manner, theprocessor 194 continues to control the capacitor Cs coupled to thestation 3 until the parameter is within the third pre-determined range.On the other hand, upon determining that the parameter is within thethird pre-determined range, the processor 904 does not send a commandsignal to the driver D3. When the command signal is not received by thedriver D3, the driver D3 does not generate the current signal and thecapacitance of the capacitor Cs coupled to the station 3 does notchange.

Furthermore, the processor 904 receives a measurement of the parameterfrom the VI probe 110 coupled to the RF transmission line 706D anddetermines whether the parameter is within a fourth pre-determinedrange. Upon determining that the parameter is not within the fourthpre-determined range, the processor 904 sends a command signal to thedriver D4. Upon receiving the command signal, the driver D4 generates acurrent signal to send to the motor M4. The motor M4 operates to changea capacitance of the capacitor Cs coupled to the station 4. The changein the capacitance of the capacitor Cs changes the parameter measured bythe VI probe 110 that is coupled to the output O5. In such a manner, theprocessor 194 continues to control the capacitor Cs coupled to thestation 4 until the parameter is within the fourth pre-determined range.On the other hand, upon determining that the parameter is within thefourth pre-determined range, the processor 904 does not send a commandsignal to the driver D4. When the command signal is not received by thedriver D4, the driver D4 does not generate the current signal and thecapacitance of the capacitor Cs coupled to the station 4 does notchange. When the first pre-determined range is the same as the secondpre-determined range, the third pre-determined range, and the fourthpre-determined range, balancing is performed in which the parameter,e.g., power, is balanced, that is measured by the VI probes 110 coupledto the outputs O2 through O5 is within a single pre-determined range.

In some embodiments, the first pre-determined range is different fromone or more of the second pre-determined range, the third pre-determinedrange, and the fourth pre-determined range.

In various embodiments, a capacitance of the capacitor Cs of the shuntcircuit 108 coupled to the RF transmission line 706A is modifiedmanually until the parameter measured by the VI probe 110 coupled to theoutput O2 is within the first pre-determined range. Similarly, acapacitance of the capacitor Cs of the shunt circuit 108 coupled to theRF transmission line 706B is changed by a person until the parametermeasured by the VI probe 110 coupled to the output O3 is within thesecond pre-determined range. Also, a capacitance of the capacitor Cs ofthe shunt circuit 108 coupled to the RF transmission line 706C iscontrolled manually until the parameter measured by the VI probe 110coupled to the output O4 is within the third pre-determined range.Moreover, a capacitance of the capacitor Cs of the shunt circuit 108coupled to the RF transmission line 706C is modified manually until theparameter measured by the VI probe 110 coupled to the output O5 iswithin the fourth pre-determined range.

In some embodiments, capacitances of the capacitors Cs of the shuntcircuits 108 coupled to the RF transmission lines 706A through 706D arechanged manually until the parameter measured by the VI probes 110coupled to the outputs O2 through O5 are balanced to be within thesingle pre-determined range, e.g., the first pre-determined range or thesecond pre-determined range or the third pre-determined range or thefourth pre-determined range.

FIG. 9B is a diagram of an embodiment of a multi-station system 920 fornegating impedances associated with parasitic capacitances of thestations 1 through 4 by changing inductances of the inductors Lvs of theshunt circuits 532. The multi-station system 920 is the same as themulti-station system 900 of FIG. 9A except that the multi-station system920 includes the shunt circuits 532 coupled to the points P1 of the RFtransmission lines 706A through 706D. Moreover, in the system 920, themotors M1 through M4 are coupled to the inductors Lvs instead of beingcoupled to the capacitors Cs of the system 900.

The multi-station system 920 includes the shunt circuit 532 coupled tothe point P1 on the RF transmission line 706A. Moreover, themulti-station system 920 has the shunt circuit 532 coupled to the pointP1 on the RF transmission line 706B, the shunt circuit 532 coupled tothe point P1 on the RF transmission line 706C, and the shunt circuit 532coupled to the point P1 on the RF transmission line 706D. The motor M1is coupled via a connection mechanism to the inductor Lvs of the shuntcircuit 532 coupled to the point P1 on the RF transmission line 706A.Similarly, the motor M2 is coupled via a connection mechanism to theinductor Lvs of the shunt circuit 532 coupled to the point P1 on the RFtransmission line 706B, the motor M3 is coupled via a connectionmechanism to the inductor Lvs of the shunt circuit 532 coupled to thepoint P1 on the RF transmission line 706C, and the motor M1 is coupledvia a connection mechanism to the inductor Lvs of the shunt circuit 532coupled to the point P1 on the RF transmission line 706D.

The processor 904 receives a measurement of the parameter from the VIprobe 110 coupled to the RF transmission line 706A and determineswhether the parameter is within a first pre-determined span. Upondetermining that the parameter is not within the first pre-determinedspan, the processor 904 sends a command signal to the driver D1. Uponreceiving the command signal, the driver D1 generates a current signalto send to the motor M1. The motor M1 operates to change an inductanceof the inductor Lvs coupled to the station 1. For example, when a statorof the motor M1 receives the current signal, a rotor of the motorrotates to change a position of the core of the inductor Lvs that iscoupled to the point P1 on the RF transmission line 706A. The positionof the core is changed with respect to windings of the inductor Lvs thatis coupled to the point P1 on the RF transmission line 706A. The changein the inductance of the inductor Lvs changes the parameter measured bythe VI probe 110 that is coupled to the output O2. In such a manner, theprocessor 194 continues to control the inductor Lvs coupled to thestation 1 until the parameter is within the first pre-determined span.On the other hand, upon determining that the parameter is within thefirst pre-determined span, the processor 904 does not send a commandsignal to the driver D1. When the command signal is not received by thedriver D1, the driver D1 does not generate the current signal and theinductance of the inductor Lvs coupled to the station 1 does not change.

Similarly, the processor 904 receives a measurement of the parameterfrom the VI probe 110 coupled to the RF transmission line 706B anddetermines whether the parameter is within a second pre-determined span.Upon determining that the parameter is not within the secondpre-determined span, the processor 904 sends a command signal to thedriver D2. Upon receiving the command signal, the driver D2 generates acurrent signal to send to the motor M2. The motor M2 operates to changean inductance of the inductor Lvs coupled to the station 2. The changein the inductance of the inductor Lvs changes the parameter measured bythe VI probe 110 that is coupled to the output O3. In such a manner, theprocessor 194 continues to control the inductor Lvs coupled to thestation 2 until the parameter is within the second pre-determined span.On the other hand, upon determining that the parameter is within thesecond pre-determined span, the processor 904 does not send a commandsignal to the driver D2. When the command signal is not received by thedriver D2, the driver D2 does not generate the current signal and theinductance of the inductor Lvs coupled to the station 2 does not change.

Moreover, the processor 904 receives a measurement of the parameter fromthe VI probe 110 coupled to the RF transmission line 706C and determineswhether the parameter is within a third pre-determined span. Upondetermining that the parameter is not within the third pre-determinedspan, the processor 904 sends a command signal to the driver D3. Uponreceiving the command signal, the driver D3 generates a current signalto send to the motor M3. The motor M3 operates to change an inductanceof the inductor Lvs coupled to the station 3. The change in theinductance of the inductor Lvs changes the parameter measured by the VIprobe 110 that is coupled to the output O4. In such a manner, theprocessor 194 continues to control the inductor Lvs coupled to thestation 3 until the parameter is within the third pre-determined span.On the other hand, upon determining that the parameter is within thethird pre-determined span, the processor 904 does not send a commandsignal to the driver D3. When the command signal is not received by thedriver D3, the driver D3 does not generate the current signal and theinductance of the inductor Lvs coupled to the station 3 does not change.

Furthermore, the processor 904 receives a measurement of the parameterfrom the VI probe 110 coupled to the RF transmission line 706D anddetermines whether the parameter is within a fourth pre-determined span.Upon determining that the parameter is not within the fourthpre-determined span, the processor 904 sends a command signal to thedriver D4. Upon receiving the command signal, the driver D4 generates acurrent signal to send to the motor M4. The motor M4 operates to changean inductance of the inductor Lvs coupled to the station 4. The changein the inductance of the inductor Lvs changes the parameter measured bythe VI probe 110 that is coupled to the output O5. In such a manner, theprocessor 194 continues to control the inductor Lvs coupled to thestation 4 until the parameter is within the fourth pre-determined span.On the other hand, upon determining that the parameter is within thefourth pre-determined span, the processor 904 does not send a commandsignal to the driver D4. When the command signal is not received by thedriver D4, the driver D4 does not generate the current signal and theinductance of the inductor Lvs coupled to the station 4 does not change.

In some embodiments, the first pre-determined span is different from oneor more of the second pre-determined span, the third pre-determinedspan, and the fourth pre-determined span.

In several embodiments, the first pre-determined span is the same as thesecond pre-determined span, the third pre-determined span, and thefourth pre-determined span. In these embodiments, when the firstpre-determined span is the same as the second pre-determined span, thethird pre-determined span, and the fourth pre-determined span, theparameter measured at the outputs O2 through O5 is balanced.

In various embodiments, an inductance of the inductor Lvs of the shuntcircuit 532 coupled to the RF transmission line 706A is modifiedmanually until the parameter measured by the VI probe 110 coupled to theoutput O2 is within the first pre-determined span. Similarly, aninductance of the inductor Lvs of the shunt circuit 532 coupled to theRF transmission line 706B is changed by a person until the parametermeasured by the VI probe 110 coupled to the output O3 is within thesecond pre-determined span. Also, an inductance of the inductor Lvs ofthe shunt circuit 532 coupled to the RF transmission line 706C iscontrolled manually until the parameter measured by the VI probe 110coupled to the output O4 is within the third pre-determined span.Moreover, an inductance of the inductor Lvs of the shunt circuit 532coupled to the RF transmission line 706D is modified manually until theparameter measured by the VI probe 110 coupled to the output O5 iswithin the fourth pre-determined span.

In some embodiments, inductances of the inductors Lvs of the shuntcircuits 532 coupled to the RF transmission lines 706A through 706D arechanged manually until the parameter measured by the VI probes 110coupled to the outputs O2 through O5 are balanced to be within thesingle pre-determined span, e.g., the first pre-determined span or thesecond pre-determined span or the third pre-determined span or thefourth pre-determined span.

FIG. 9C is a diagram of an embodiment of a multi-station processingsystem 940 for negating impedances associated with parasiticcapacitances of the stations 1 through 4 by changing inductance of theinductors Lvs and capacitors Cs of the shunt circuits 532. The system940 is the same as the system 920 of FIG. 9B except that the system 940includes the shunt circuits 542 coupled to the points P1 of the RFtransmission lines 706A through 706D. Moreover, the system 940 includesthe motors M1 through M4, and additional motors M5, M6, M7, and M8.Also, the system 940 includes the drivers D1 through D4, and additionaldrivers D5, D6, D7, and D8.

The shunt circuit 542 is coupled at its end E1 to the point P1 on the RFtransmission line 706A. Similarly, the shunt circuit 542 is coupled atits end E1 to the point P1 on the RF transmission line 706B, the shuntcircuit 542 is coupled at its end E1 to the point P1 on the RFtransmission line 706C, and the shunt circuit 542 is coupled at its endE1 to the point P1 on the RF transmission line 706D.

The motor M1 is coupled via a connection mechanism to the inductor Lvsof the shunt circuit 542 coupled to the point P1 on the RF transmissionline 706A. In a similar manner, the motor M3 is coupled via a connectionmechanism to the inductor Lvs of the shunt circuit 542 coupled to thepoint P1 on the RF transmission line 706B, the motor M5 is coupled via aconnection mechanism to the inductor Lvs of the shunt circuit 542coupled to the point P1 on the RF transmission line 706C, and the motorM7 is coupled via a connection mechanism to the inductor Lvs of theshunt circuit 542 coupled to the point P1 on the RF transmission line706D.

The motor M2 is coupled via a connection mechanism to the capacitor Csof the shunt circuit 542 coupled to the point P1 on the RF transmissionline 706A. In a similar manner, the motor M4 is coupled via a connectionmechanism to the capacitor Cs of the shunt circuit 542 coupled to thepoint P1 on the RF transmission line 706B, the motor M6 is coupled via aconnection mechanism to the capacitor Cs of the shunt circuit 542coupled to the point P1 on the RF transmission line 706C, and the motorM8 is coupled via a connection mechanism to the capacitor Cs of theshunt circuit 542 coupled to the point P1 on the RF transmission line706D.

Furthermore, the driver D1 is coupled to the motor M1, the driver D2 iscoupled to the motor M2, the driver D3 is coupled to the motor M3, andthe driver D4 is coupled to the motor M4. Similarly, the driver D5 iscoupled to the motor M5, the driver D6 is coupled to the motor M6, thedriver D7 is coupled to the motor M7, and the driver D8 is coupled tothe motor M8. The processor 904 is coupled to the drivers D1 through D8.

The processor 904 receives a measurement of the parameter from the VIprobe 110 coupled to the RF transmission line 706A and determineswhether the parameter is within a first pre-determined extent. Upondetermining that the parameter is not within the first pre-determinedextent, the processor 904 sends command signals to the drivers D1 andD2. Upon receiving one of the command signals, the driver D1 generates acurrent signal to send to the motor M1. The motor M1 operates to changean inductance of the inductor Lvs coupled to the station 1. Similarly,upon receiving another one of the command signals, the driver D2generates a current signal to send to the motor M2. The motor M2operates to change a capacitance of the capacitor Cs coupled to thestation 1. The change in the inductance of the inductor Lvs coupled tothe station 1 and the capacitance of the capacitor Cs coupled to thestation 1 changes the parameter measured by the VI probe 110 that iscoupled to the output O2. In such a manner, the processor 194 continuesto control the inductor Lvs coupled to the station 1 and the capacitorCs coupled to the station 1 until the parameter is within the firstpre-determined extent. On the other hand, upon determining that theparameter is within the first pre-determined extent, the processor 904does not send the command signals to the drivers D1 and D2. When thecommand signal is not received by the driver D1, the driver D1 does notgenerate the current signal and the inductance of the inductor Lvscoupled to the station 1 does not change. Similarly, when the commandsignal is not received by the driver D2, the driver D2 does not generatethe current signal and the capacitance of the capacitor Cs coupled tothe station 1 does not change.

In a similar manner, the processor 904 receives a measurement of theparameter from the VI probe 110 coupled to the RF transmission line 706Band determines whether the parameter is within a second pre-determinedextent. Upon determining that the parameter is not within the secondpre-determined extent, the processor 904 sends command signals to thedrivers D3 and D4. Upon receiving one of the command signals, the driverD3 generates a current signal to send to the motor M3. The motor M3operates to change an inductance of the inductor Lvs coupled to thestation 2. Similarly, upon receiving another one of the command signals,the driver D4 generates a current signal to send to the motor M4. Themotor M4 operates to change a capacitance of the capacitor Cs coupled tothe station 2. The change in the inductance of the inductor Lvs coupledto the station 2 and the capacitance of the capacitor Cs coupled to thestation 2 changes the parameter measured by the VI probe 110 that iscoupled to the output O3. In such a manner, the processor 194 continuesto control the inductor Lvs coupled to the station 2 and the capacitorCs coupled to the station 2 until the parameter is within the secondpre-determined extent. On the other hand, upon determining that theparameter is within the second pre-determined extent, the processor 904does not send the command signals to the drivers D3 and D4. When thecommand signal is not received by the driver D3, the driver D3 does notgenerate the current signal and the inductance of the inductor Lvscoupled to the station 2 does not change. Similarly, when the commandsignal is not received by the driver D4, the driver D4 does not generatethe current signal and the capacitance of the capacitor Cs coupled tothe station 2 does not change.

Also, the processor 904 receives a measurement of the parameter from theVI probe 110 coupled to the RF transmission line 706C and determineswhether the parameter is within a third pre-determined extent. Upondetermining that the parameter is not within the third pre-determinedextent, the processor 904 sends command signals to the drivers D5 andD6. Upon receiving one of the command signals, the driver D5 generates acurrent signal to send to the motor M5. The motor M5 operates to changean inductance of the inductor Lvs coupled to the station 3. Similarly,upon receiving another one of the command signals, the driver D6generates a current signal to send to the motor M6. The motor M6operates to change a capacitance of the capacitor Cs coupled to thestation 3. The change in the inductance of the inductor Lvs coupled tothe station 3 and the capacitance of the capacitor Cs coupled to thestation 3 changes the parameter measured by the VI probe 110 that iscoupled to the output O4. In such a manner, the processor 194 continuesto control the inductor Lvs coupled to the station 3 and the capacitorCs coupled to the station 3 until the parameter is within the thirdpre-determined extent. On the other hand, upon determining that theparameter is within the third pre-determined extent, the processor 904does not send the command signals to the drivers D5 and D6. When thecommand signal is not received by the driver D5, the driver D5 does notgenerate the current signal and the inductance of the inductor Lvscoupled to the station 3 does not change. Similarly, when the commandsignal is not received by the driver D6, the driver D6 does not generatethe current signal and the capacitance of the capacitor Cs coupled tothe station 3 does not change.

Moreover, the processor 904 receives a measurement of the parameter fromthe VI probe 110 coupled to the RF transmission line 706D and determineswhether the parameter is within a fourth pre-determined extent. Upondetermining that the parameter is not within the fourth pre-determinedextent, the processor 904 sends command signals to the drivers D7 andD8. Upon receiving one of the command signals, the driver D7 generates acurrent signal to send to the motor M7. The motor M7 operates to changean inductance of the inductor Lvs coupled to the station 4. Similarly,upon receiving another one of the command signals, the driver D8generates a current signal to send to the motor M8. The motor M8operates to change a capacitance of the capacitor Cs coupled to thestation 4. The change in the inductance of the inductor Lvs coupled tothe station 4 and the capacitance of the capacitor Cs coupled to thestation 4 changes the parameter measured by the VI probe 110 that iscoupled to the output O5. In such a manner, the processor 194 continuesto control the inductor Lvs coupled to the station 4 and the capacitorCs coupled to the station 4 until the parameter is within the fourthpre-determined extent. On the other hand, upon determining that theparameter is within the fourth pre-determined extent, the processor 904does not send the command signals to the drivers D7 and D8. When thecommand signal is not received by the driver D7, the driver D7 does notgenerate the current signal and the inductance of the inductor Lvscoupled to the station 4 does not change. Similarly, when the commandsignal is not received by the driver D8, the driver D8 does not generatethe current signal and the capacitance of the capacitor Cs coupled tothe station 4 does not change.

In some embodiments, the first pre-determined extent is different fromone or more of the second pre-determined extent, the thirdpre-determined extent, and the fourth pre-determined extent.

In several embodiments, the first pre-determined extent is the same asthe second pre-determined extent, the third pre-determined extent, andthe fourth pre-determined extent. In these embodiments, when the firstpre-determined extent is the same as the second pre-determined extent,the third pre-determined extent, and the fourth pre-determined extent,the parameter at the outputs O2 through O5 is balanced.

In various embodiments, an inductance of the inductor Lvs of the shuntcircuit 542 coupled to the RF transmission line 706A and a capacitanceof the capacitor Cs of the shunt circuit 542 coupled to the RFtransmission line 706A are modified manually until the parametermeasured by the VI probe 110 coupled to the output O2 is within thefirst pre-determined extent. Similarly, an inductance of the inductorLvs of the shunt circuit 542 coupled to the RF transmission line 706Band a capacitance of the capacitor Cs of the shunt circuit 542 coupledto the RF transmission line 706B are changed by a person until theparameter measured by the VI probe 110 coupled to the output O3 iswithin the second pre-determined extent. Also, an inductance of theinductor Lvs of the shunt circuit 542 coupled to the RF transmissionline 706C and a capacitance of the capacitor Cs of the shunt circuit 542coupled to the RF transmission line 706C are controlled manually untilthe parameter measured by the VI probe 110 coupled to the output O4 iswithin the third pre-determined extent. Moreover, an inductance of theinductor Lvs of the shunt circuit 542 coupled to the RF transmissionline 706C and a capacitance of the capacitor Cs of the shunt circuit 542coupled to the RF transmission line 706D are modified manually until theparameter measured by the VI probe 110 coupled to the output O5 iswithin the fourth pre-determined extent.

In some embodiments, inductances of the inductors Lvs and capacitancesof the capacitors Cs of the shunt circuits 542 coupled to the RFtransmission lines 706A through 706D are changed manually until theparameter measured by the VI probes 110 coupled to the outputs O2through O5 are balanced to be within the single pre-determined extent,e.g., the first pre-determined extent or the second pre-determinedextent or the third pre-determined extent or the fourth pre-determinedextent.

FIG. 10A is an embodiment of a graph 1000 to illustrate impedancesassociated with parasitic capacitances of the stations 1 through 4 whenshunt circuits coupled to the stations 1 through 4 are used to balancethe parameter at the outputs O2 through O5. The graph 1000 plotsmagnitudes of impedance at the outputs O2 through O5 of the powersplitter 702 (FIG. 7) on the RF transmission lines 706A through 706Dversus frequencies of operation of the RF generator 104 (FIG. 7).

A magnitude of impedance at the outputs O2 through O5 is IV4 when thefrequency of operation is 13.56 MHz and when all the shunt circuitscoupled to the stations 1 through 4 are balanced. It should be notedthat the magnitude IV4 is lower than the magnitudes IV1 and IV3 (FIG.8B) but is greater than the magnitude IV2 (FIG. 8A).

FIG. 10B is an embodiment of a table 1020 to illustrate balancing ofpower at the four stations 1 through 4. The power is measured at theoutputs O2 through O5 (FIG. 7) of the power splitter 702. It should benoted that power at the outputs O2 through O5 ranges between 576 wattsand 593 watts compared to power at the outputs O2 through O5 when thepower is not balanced (see FIG. 8E). Although the impedance is reducedat the outputs O2 through O5, power at the outputs O2 through O5 isbalanced.

It should be noted that in some embodiments, when the parameter at theoutputs O2 through O5 is balanced, an average deposition rate ofdepositing materials, e.g., oxides, nitrides, carbides, silicon, etc.,on wafers 112 (FIG. 7) at the stations 1 through 4 can increase by 10 to15 percent compared to an average deposition rate of depositingmaterials on wafers 112 when the shunt circuits are not coupled to thestations 1 through 4.

Embodiments described herein may be practiced with various computersystem configurations including hand-held hardware units, microprocessorsystems, microprocessor-based or programmable consumer electronics,minicomputers, mainframe computers and the like. The embodiments canalso be practiced in distributed computing environments where tasks areperformed by remote processing hardware units that are linked through anetwork.

In some embodiments, a controller is part of a system, which may be partof the above-described examples. Such systems include semiconductorprocessing equipment, including a processing tool or tools, chamber orchambers, a platform or platforms for processing, and/or specificprocessing components (a wafer pedestal, a gas flow system, etc.). Thesesystems are integrated with electronics for controlling their operationbefore, during, and after processing of a semiconductor wafer orsubstrate. The electronics is referred to as the “controller,” which maycontrol various components or subparts of the system or systems. Thecontroller, depending on the processing requirements and/or the type ofsystem, is programmed to control any of the processes disclosed herein,including the delivery of process gases, temperature settings (e.g.,heating and/or cooling), pressure settings, vacuum settings, powersettings, RF generator settings, RF matching circuit settings, frequencysettings, flow rate settings, fluid delivery settings, positional andoperation settings, wafer transfers into and out of a tool and othertransfer tools and/or load locks connected to or interfaced with asystem.

Broadly speaking, in a variety of embodiments, the controller is definedas electronics having various integrated circuits, logic, memory, and/orsoftware that receive instructions, issue instructions, controloperation, enable cleaning operations, enable endpoint measurements, andthe like. The integrated circuits include chips in the form of firmwarethat store program instructions, digital signal processors (DSPs), chipsdefined as ASICs, PLDs, and/or one or more microprocessors, ormicrocontrollers that execute program instructions (e.g., software). Theprogram instructions are instructions communicated to the controller inthe form of various individual settings (or program files), definingoperational parameters for carrying out a particular process on or for asemiconductor wafer or to a system. The operational parameters are, insome embodiments, a part of a recipe defined by process engineers toaccomplish one or more processing steps during the fabrication of one ormore layers, materials, metals, oxides, silicon, silicon dioxide,surfaces, circuits, and/or dies of a wafer.

The controller, in some embodiments, is a part of or coupled to acomputer that is integrated with, coupled to the system, otherwisenetworked to the system, or a combination thereof. For example, thecontroller is in a “cloud” or all or a part of a fab host computersystem, which allows for remote access of the wafer processing. Thecomputer enables remote access to the system to monitor current progressof fabrication operations, examines a history of past fabricationoperations, examines trends or performance metrics from a plurality offabrication operations, to change parameters of current processing, toset processing steps to follow a current processing, or to start a newprocess.

In some embodiments, a remote computer (e.g. a server) provides processrecipes to a system over a network, which includes a local network orthe Internet. The remote computer includes a user interface that enablesentry or programming of parameters and/or settings, which are thencommunicated to the system from the remote computer. In some examples,the controller receives instructions in the form of data, which specifyparameters for each of the processing steps to be performed during oneor more operations. It should be understood that the parameters arespecific to the type of process to be performed and the type of toolthat the controller is configured to interface with or control. Thus asdescribed above, the controller is distributed, such as by including oneor more discrete controllers that are networked together and workingtowards a common purpose, such as the processes and controls describedherein. An example of a distributed controller for such purposesincludes one or more integrated circuits on a chamber in communicationwith one or more integrated circuits located remotely (such as at theplatform level or as part of a remote computer) that combine to controla process on the chamber.

Without limitation, in various embodiments, example systems include aplasma etch chamber or module, a deposition chamber or module, aspin-rinse chamber or module, a metal plating chamber or module, a cleanchamber or module, a bevel edge etch chamber or module, a physical vapordeposition (PVD) chamber or module, a chemical vapor deposition (CVD)chamber or module, an atomic layer deposition (ALD) chamber or module,an atomic layer etch (ALE) chamber or module, an ion implantationchamber or module, a track chamber or module, and any othersemiconductor processing systems that is associated or used in thefabrication and/or manufacturing of semiconductor wafers.

It is further noted that in some embodiments, the above-describedoperations apply to several types of plasma chambers, e.g., a plasmachamber including an inductively coupled plasma (ICP) reactor, atransformer coupled plasma chamber, a capacitively coupled plasmareactor, conductor tools, dielectric tools, a plasma chamber includingan electron cyclotron resonance (ECR) reactor, etc. For example, one ormore RF generators are coupled to an inductor within the ICP reactor.Examples of a shape of the inductor include a solenoid, a dome-shapedcoil, a flat-shaped coil, etc.

As noted above, depending on the process step or steps to be performedby the tool, the controller communicates with one or more of other toolcircuits or modules, other tool components, cluster tools, other toolinterfaces, adjacent tools, neighboring tools, tools located throughouta factory, a main computer, another controller, or tools used inmaterial transport that bring containers of wafers to and from toollocations and/or load ports in a semiconductor manufacturing factory.

With the above embodiments in mind, it should be understood that some ofthe embodiments employ various computer-implemented operations involvingdata stored in computer systems. These operations are those physicallymanipulating physical quantities. Any of the operations described hereinthat form part of the embodiments are useful machine operations.

Some of the embodiments also relate to a hardware unit or an apparatusfor performing these operations. The apparatus is specially constructedfor a special purpose computer. When defined as a special purposecomputer, the computer performs other processing, program execution orroutines that are not part of the special purpose, while still beingcapable of operating for the special purpose.

In some embodiments, the operations may be processed by a computerselectively activated or configured by one or more computer programsstored in a computer memory, cache, or obtained over the computernetwork. When data is obtained over the computer network, the data maybe processed by other computers on the computer network, e.g., a cloudof computing resources.

One or more embodiments can also be fabricated as computer-readable codeon a non-transitory computer-readable medium. The non-transitorycomputer-readable medium is any data storage hardware unit, e.g., amemory device, etc., that stores data, which is thereafter be read by acomputer system. Examples of the non-transitory computer-readable mediuminclude hard drives, network attached storage (NAS), ROM, RAM, compactdisc-ROMs (CD-ROMs), CD-recordables (CD-Rs), CD-rewritables (CD-RWs),magnetic tapes and other optical and non-optical data storage hardwareunits. In some embodiments, the non-transitory computer-readable mediumincludes a computer-readable tangible medium distributed over anetwork-coupled computer system so that the computer-readable code isstored and executed in a distributed fashion.

Although the method operations above were described in a specific order,it should be understood that in various embodiments, other housekeepingoperations are performed in between operations, or the method operationsare adjusted so that they occur at slightly different times, or aredistributed in a system which allows the occurrence of the methodoperations at various intervals, or are performed in a different orderthan that described above.

It should further be noted that in an embodiment, one or more featuresfrom any embodiment described above are combined with one or morefeatures of any other embodiment without departing from a scopedescribed in various embodiments described in the present disclosure.

Although the foregoing embodiments have been described in some detailfor purposes of clarity of understanding, it will be apparent thatcertain changes and modifications can be practiced within the scope ofappended claims. Accordingly, the present embodiments are to beconsidered as illustrative and not restrictive, and the embodiments arenot to be limited to the details given herein, but may be modifiedwithin the scope and equivalents of the appended claims.

1. A system for negating an impedance associated with parasiticcapacitance, comprising: a plasma chamber having a housing, wherein thehousing includes: a pedestal; a showerhead situated above the pedestalto face the pedestal; and a ceiling located above the showerhead; aradio frequency (RF) transmission line coupled to the plasma chamber fortransferring a modified RF signal to the showerhead; and a shunt circuitcoupled within a pre-determined distance from the ceiling, wherein theshunt circuit is coupled to the RF transmission line for negating theimpedance associated with the parasitic capacitance within the housing.2. The system of claim 1, wherein the shunt circuit is coupled to aground potential at one end and is coupled to the RF transmission lineat another end.
 3. The system of claim 1, wherein the shunt circuit iscoupled to the housing at one end to be coupled to a ground potentialand is coupled to the RF transmission line at another end.
 4. The systemof claim 1, wherein the shunt circuit is coupled to the ceiling at oneend to be coupled to a ground potential and is coupled to the RFtransmission line at another end.
 5. The system of claim 1, wherein theshunt circuit includes an inductor coupled in parallel to a variablecapacitor.
 6. The system of claim 1, wherein the shunt circuit includesan inductor.
 7. The system of claim 1, further comprising: a motorcoupled to the shunt circuit; a processor coupled to the motor, whereinthe motor is configured to control the motor to change a capacitance ofthe shunt circuit to increase the impedance associated with theparasitic capacitance.
 8. The system of claim 1, further comprising: amotor coupled to the shunt circuit; a processor coupled to the motor,wherein the processor is configured to control the motor to increase theimpedance until a parameter measured by a probe is within apre-determined range.
 9. The system of claim 1, wherein the housingincludes a side wall, wherein the showerhead is coupled to the side wallto be supported by the side wall.
 10. A shunt circuit comprising: avariable capacitor; and an inductor coupled in parallel with thevariable capacitor to form a first end and a second end, wherein thefirst end is coupled to a radio frequency (RF) transmission line coupledbetween an impedance matching circuit and a showerhead of a plasmachamber, wherein the second end is coupled to a housing of the plasmachamber, wherein the variable capacitor and the inductor are configuredto negate an impedance associated with the parasitic capacitance withinthe housing.
 11. The shunt circuit of claim 10, wherein the second endis coupled to a ceiling of the housing of the plasma chamber to becoupled to a ground potential.
 12. The shunt circuit of claim 10,wherein the variable capacitor is coupled to a motor to change acapacitance of the variable capacitor until a parameter at an output ofthe impedance matching circuit is within a pre-determined range, whereinthe RF transmission line is coupled to the output of the impedancematching circuit.
 13. The shunt circuit of claim 12, wherein the motoris coupled to a processor, wherein the processor is coupled to a probefor receiving a measurement of the parameter from the probe.
 14. Theshunt circuit of claim 13, wherein the probe is coupled to the output ofthe impedance matching circuit.
 15. The shunt circuit of claim 10,wherein the housing includes a side, wherein the showerhead is coupledto the side to be supported by the side.
 16. A multi-station processingtool comprising: a radio frequency (RF) generator configured to generatean RF signal; an impedance matching circuit coupled to the RF generatorto receive the RF signal to output a modified RF signal; and a powersplitter coupled to the impedance matching circuit to distribute powerof the modified RF signal to output a plurality of modified RF outputsignals; a first station coupled to a first output of the power splittervia a first RF transmission line to receive a first one of the modifiedRF output signals; a second station coupled to a second output of thepower splitter via a second RF transmission line to receive a second oneof the modified RF output signals; a first shunt circuit coupled to thefirst RF transmission line to negate an impedance associated with aparasitic capacitance associated with the first station; and a secondshunt circuit coupled to the second RF transmission line to negate animpedance associated with a parasitic capacitance associated with thesecond station.
 17. The multi-station processing tool of claim 16,wherein the first station has a first housing and the second station hasa second housing, wherein the first shunt circuit has an end coupled tothe first housing to be coupled to a ground potential of the firststation and has another end coupled to the first RF transmission line,wherein the second shunt circuit has an end coupled to the secondhousing to be coupled to a ground potential of the second station andhas another end coupled to the second RF transmission line.
 18. Themulti-station processing tool of claim 16, wherein the first station hasa first housing and the second station has a second housing, wherein thefirst shunt circuit has an end coupled to a ceiling of the first housingto be coupled to a ground potential of the first station and has anotherend coupled to the first RF transmission line, wherein the second shuntcircuit has an end coupled to a ceiling of the second housing to becoupled to a ground potential of the second station and has another endcoupled to the second RF transmission line.
 19. The multi-stationprocessing tool of claim 16, wherein the first shunt circuit includes aninductor coupled in parallel with a capacitor, wherein the second shuntcircuit includes an inductor coupled in parallel with a capacitor. 20.The multi-station processing tool of claim 16, wherein the first shuntcircuit includes an inductor, wherein the second shunt circuit includesan inductor.